PIC18F14K22-I

{
  "slug": "pic18f14k22-i",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Microcontrollers (MCU/MPU/SOC), QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "pic18f14k22-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pic18f14k22-i.kicad_sym",
    "pic18f14k22-i.kicad_mod",
    "pic18f14k22-i.glb",
    "pic18f14k22-i.step",
    "pic18f14k22-i.lbr",
    "docs/hero.png",
    "docs/pic18f14k22-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pic18f14k22-i-hero.glb",
    "pic18f14k22-i-hero.overlay.json",
    "pic18f14k22-i-etched.glb"
  ],
  "component": {
    "mpn": "PIC18F14K22-I",
    "manufacturer": "Microchip Tech",
    "package": "QFN-20-EP(4x4)",
    "pin_count": 21,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589806843666608128",
    "parts": {
      "symbol": "pic18f14k22-i.kicad_sym",
      "footprint": "pic18f14k22-i.kicad_mod",
      "model_3d": "pic18f14k22-i-hero.glb",
      "model_3d_plain": "pic18f14k22-i-etched.glb",
      "model_3d_step": "pic18f14k22-i-etched.step",
      "model_3d_step_plain": "pic18f14k22-i.step",
      "lbr": "pic18f14k22-i.lbr"
    },
    "distributor_links": {
      "lcsc": "C638171"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T02:46:36Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "RA3/MCLR/VPP",
        "type": "input",
        "description": "Input-only pin (Schmitt Trigger) that serves as active-low Master Clear MCLR with internal pull-up or as high-voltage programming input VPP; the RA3 digital input function is only available when MCLR functionality is disabled."
      },
      {
        "number": "2",
        "name": "RC5/CCP1/P1A",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ECCP1 capture input, compare or PWM output CCP1, and Enhanced CCP1 PWM output P1A."
      },
      {
        "number": "3",
        "name": "RC4/C2OUT/P1B/SRNQ",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as Comparator 2 output C2OUT, Enhanced CCP1 PWM output P1B, and SR latch inverted output SRNQ."
      },
      {
        "number": "4",
        "name": "RC3/AN7/C12IN3-/P1C/PGM",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ADC channel 7, Comparator C1 and C2 inverting input channel 3, Enhanced CCP1 PWM output P1C, and Low-Voltage ICSP programming enable pin PGM (Schmitt Trigger input, all other functions disabled when enabled by the LVP Configuration bit)."
      },
      {
        "number": "5",
        "name": "RC6/AN8/SS",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ADC channel 8 and SPI slave select input SS for the MSSP module (TTL input)."
      },
      {
        "number": "6",
        "name": "RC7/AN9/SDO",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ADC channel 9 and SPI data output SDO for the MSSP module."
      },
      {
        "number": "7",
        "name": "RB7/TX/CK",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as EUSART asynchronous transmit TX and synchronous clock CK."
      },
      {
        "number": "8",
        "name": "RB6/SCK/SCL",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as SPI clock SCK and I2C clock SCL for the MSSP module."
      },
      {
        "number": "9",
        "name": "RB5/AN11/RX/DT",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as ADC channel 11, EUSART asynchronous receive RX, and EUSART synchronous data DT."
      },
      {
        "number": "10",
        "name": "RB4/AN10/SDI/SDA",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as ADC channel 10, SPI data input SDI, and I2C data SDA for the MSSP module."
      },
      {
        "number": "11",
        "name": "RC2/AN6/C12IN2-/P1D",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ADC channel 6, Comparator C1 and C2 inverting input channel 2, and Enhanced CCP1 PWM output P1D."
      },
      {
        "number": "12",
        "name": "RC1/AN5/C12IN1-",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ADC channel 5 and Comparator C1 and C2 inverting input channel 1."
      },
      {
        "number": "13",
        "name": "RC0/AN4/C2IN+",
        "type": "bidirectional",
        "description": "Digital I/O that also serves as ADC channel 4 and Comparator C2 noninverting input."
      },
      {
        "number": "14",
        "name": "RA2/AN2/C1OUT/T0CKI/INT2/SRQ",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as ADC channel 2, Comparator C1 output, Timer0 external clock input T0CKI, external interrupt INT2, and SR latch output SRQ."
      },
      {
        "number": "15",
        "name": "RA1/AN1/C12IN0-/VREF+/INT1/PGC",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as ADC channel 1, Comparator C1 and C2 inverting input channel 0, ADC and DAC reference voltage (high) input VREF+, external interrupt INT1, and ICSP programming clock PGC."
      },
      {
        "number": "16",
        "name": "RA0/AN0/CVREF/VREF-/C1IN+/INT0/PGD",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as ADC channel 0, DAC reference voltage output CVREF/DAC1OUT, ADC and DAC reference voltage (low) input VREF-, Comparator C1 noninverting input, external interrupt INT0, and ICSP programming data PGD."
      },
      {
        "number": "17",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference for logic and I/O pins."
      },
      {
        "number": "18",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply for logic and I/O pins."
      },
      {
        "number": "19",
        "name": "RA5/OSC1/CLKIN/T13CKI",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as oscillator crystal input OSC1, external clock source input CLKIN, and Timer1/Timer3 external clock input T13CKI."
      },
      {
        "number": "20",
        "name": "RA4/AN3/OSC2/CLKOUT",
        "type": "bidirectional",
        "description": "Digital I/O with programmable weak pull-up that also serves as ADC channel 3, oscillator crystal output OSC2 (crystal modes), and CLKOUT, which outputs the instruction cycle clock at 1/4 the OSC1 frequency in RC mode."
      },
      {
        "number": "21",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed pad (EP) is shown in the QFN package drawing (page 380) but the datasheet text gives no ; The QFN pin numbers come from Table 1 and Table 1-2 (pages 3 and 10-11). The 20 QFN pins 1-20 were e; RA3 is input-only and has no TRISA bit; it is typed as input, not bidirectional, per Table 8-1 note ",
          "exposed pad 21 added from the footprint"
        ],
        "pages_sent": 56,
        "cost_usd": 0.2443,
        "at": "2026-10-19T02:46:22"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589806843666608128",
        "pages": 387,
        "sha256": "21f69d409798287f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 21,
        "described": 21,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "pic18f14k22-i.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c9476a1612023de37f27b4972110ab6ac6dc0eaf5ac48957a2e1c497650082a5",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "pic18f14k22-i-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "392c1ebddd7e05861d023fba115e5bc9726fb63879f43e7bf915dd3188834af3",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}