component
PI6C49X0201WIEX
Public Made by Adomby adom
Diodes Incorporated Translators / Level Shifters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PI6C49X0201WIEX
Diodes Incorporated · Translators / Level Shifters · SOIC-8
PI6C49X0201WIEX from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | nc | unconnected | No connect; the datasheet lists this pin as unused. |
| 2 | CLK | input | Non-inverting differential clock input with an internal pulldown resistor of 51 kΩ; it accepts LVPECL, LVDS, LVHSTL, SSTL, and HCSL levels. |
| 3 | nCLK | input | Inverting differential clock input with an internal pullup resistor of 51 kΩ; it accepts LVPECL, LVDS, LVHSTL, SSTL, and HCSL levels. |
| 4 | nc | unconnected | No connect; the datasheet lists this pin as unused. |
| 5 | GND | power_in | Power supply ground. |
| 6 | nc | unconnected | No connect; the datasheet lists this pin as unused. |
| 7 | Q0 | output | Single-ended clock output with LVCMOS/LVTTL interface levels. |
| 8 | VDD | power_in | Positive supply pin; the datasheet specifies 3.0 V to 3.6 V (3.3 V ±0.3 V) or 2.375 V to 2.625 V (2.5 V ±5%). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Logic ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 4.6 | V | 3 | |||
| Inputs | VI | -0.5 | V | 3 | |||
| Output | VO | -0.5 | V | 3 | |||
| Storage Temperature | TSTG | -65 | 150 | °C | 3 | ||
| ESD Protection (Input) | 2000 | V | HBM | 3 | |||
| Positive Supply Voltage (3.3V option) | VDD | 3 | 3.3 | 3.6 | V | VDD = 3.3V ± 0.3V or 2.5V ± 5%, TA = -40°C to 85°C | 3 |
| Positive Supply Voltage (2.5V option) | VDD | 2.375 | 2.5 | 2.625 | V | VDD = 3.3V ± 0.3V or 2.5V ± 5%, TA = -40°C to 85°C | 3 |
| Output High Voltage (VDD = 3.6V) | VOH | 2.6 | 3.6 | V | VDD = 3.6V; NOTE 1 | 3 | |
| Output High Voltage (VDD = 2.625V) | VOH | 1.8 | 2.625 | V | VDD = 2.625V; NOTE 1 | 3 | |
| Peak-to-Peak Input Voltage | VPP | 0.15 | 1.3 | V | 3 | ||
| Output Low Voltage | VOL | 0.5 | V | VDD = 3.6V or 2.625V; NOTE 1 | 3 | ||
| Input High Current nCLK | IIH | 5 | μA | nCLK VIN = VDD = 3.6V or 2.625V | 3 | ||
| Input High Current CLK | IIH | 150 | μA | CLK VIN = VDD = 3.6V or 2.625V | 3 | ||
| Input Low Current nCLK | IIL | -150 | μA | nCLK VIN = 0V, VDD = 3.6V or 2.625V | 3 | ||
| Input Low Current CLK | IIL | -5 | μA | CLK VIN = 0V, VDD = 3.6V or 2.625V | 3 | ||
| Power Supply Current (25MHz) | IDD | 25 | mA | 25MHz, unloaded | 3 | ||
| Power Supply Current (250MHz) | IDD | 35 | mA | 250MHz, unloaded | 3 | ||
| Output Frequency (2.5V) | fMAX | 4 | 360 | MHz | VDD = 2.5V ± 5%, TA = -40°C to 85°C | 4 | |
| Propagation Delay (2.5V) | tPD | 1.9 | 2.2 | 2.5 | ns | VDD = 2.5V ± 5%; ƒ ≤ 350MHz | 4 |
| Part-to-Part Skew (2.5V) | tsk(pp) | 500 | ps | VDD = 2.5V ± 5% | 4 | ||
| Output Duty Cycle (2.5V, ƒ ≤ 250MHz) | odc | 45 | 50 | 55 | % | VDD = 2.5V ± 5%; ƒ ≤ 250MHz | 4 |
| Output Duty Cycle (2.5V, 250MHz < ƒ ≤ 350MHz) | odc | 40 | 50 | 60 | % | VDD = 2.5V ± 5%; 250MHz < ƒ ≤ 350MHz | 4 |
| Buffer Additive Phase Jitter, RMS (2.5V, 156.25MHz) | tjit | 0.04 | ps | VDD = 2.5V ± 5%; 156.25MHz, Integration Range (12kHz, 20MHz) | 4 | ||
| Buffer Additive Phase Jitter, RMS (2.5V, 125MHz) | tjit | 0.14 | ps | VDD = 2.5V ± 5%; 125MHz, Integration Range (12kHz, 20MHz) | 4 | ||
| Output Rise/Fall Time (2.5V) | tR/tF | 180 | 350 | ps | VDD = 2.5V ± 5%; 20% to 80% | 4 | |
| Output Frequency (3.3V) | fMAX | 4 | 360 | MHz | VDD = 3.3V ± 0.3V, TA = -40°C to 85°C | 4 | |
| Propagation Delay (3.3V) | tPD | 1.6 | 1.8 | 2 | ns | VDD = 3.3V ± 0.3V; ƒ ≤ 350MHz | 4 |
| Part-to-Part Skew (3.3V) | tsk(pp) | 500 | ps | VDD = 3.3V ± 0.3V | 4 | ||
| Output Duty Cycle (3.3V, ƒ ≤ 166MHz) | odc | 45 | 50 | 55 | % | VDD = 3.3V ± 0.3V; ƒ ≤ 166MHz | 4 |
| Output Duty Cycle (3.3V, 166MHz < ƒ ≤ 350MHz) | odc | 40 | 50 | 60 | % | VDD = 3.3V ± 0.3V; 166MHz < ƒ ≤ 350MHz | 4 |
| Output Rise/Fall Time (3.3V) | tR/tF | 80 | 250 | 350 | ps | VDD = 3.3V ± 0.3V; 0.8V to 2V | 4 |
| Buffer Additive Phase Jitter, RMS (3.3V, 156.25MHz) | tjit | 0.09 | ps | VDD = 3.3V ± 0.3V; 156.25MHz, Integration Range (12kHz, 20MHz) | 4 | ||
| Buffer Additive Phase Jitter, RMS (3.3V, 125MHz) | tjit | 0.15 | ps | VDD = 3.3V ± 0.3V; 125MHz, Integration Range (12kHz, 20MHz) | 4 | ||
| Input Capacitance | CIN | 4 | pF | 2 | |||
| Input Pullup Resistor | RPULLUP | 51 | kΩ | 2 | |||
| Input Pulldown Resistor | RPULLDOWN | 51 | kΩ | 2 | |||
| Power Dissipation Capacitance | CPD | 23 | pF | VDD = 3.6V | 2 | ||
| Output Impedance | ROUT | 5 | 7 | 13 | Ω | 2 | |
| Package Thermal Impedance, θJA | θJA | 103 | °C/W | 0 lfpm | 3 | ||
| Junction-to-ambient thermal resistance | ΘJA | 157 | °C/W | Still air | 5 | ||
| Junction-to-case thermal resistance | ΘJC | 42 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
PI6C49X0201WIEX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
pi6c49x0201wiex-etched.step/pi6c49x0201wiex-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pi6c49x0201wiex.step/pi6c49x0201wiex.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
6543420a15a9a9af, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PI6C49X0201WIEX
**Diodes Incorporated** · Translators / Level Shifters · SOIC-8
PI6C49X0201WIEX from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | nc | unconnected | No connect; the datasheet lists this pin as unused. |
| 2 | CLK | input | Non-inverting differential clock input with an internal pulldown resistor of 51 kΩ; it accepts LVPECL, LVDS, LVHSTL, SSTL, and HCSL levels. |
| 3 | nCLK | input | Inverting differential clock input with an internal pullup resistor of 51 kΩ; it accepts LVPECL, LVDS, LVHSTL, SSTL, and HCSL levels. |
| 4 | nc | unconnected | No connect; the datasheet lists this pin as unused. |
| 5 | GND | power_in | Power supply ground. |
| 6 | nc | unconnected | No connect; the datasheet lists this pin as unused. |
| 7 | Q0 | output | Single-ended clock output with LVCMOS/LVTTL interface levels. |
| 8 | VDD | power_in | Positive supply pin; the datasheet specifies 3.0 V to 3.6 V (3.3 V ±0.3 V) or 2.375 V to 2.625 V (2.5 V ±5%). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Logic ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | | | 4.6 | V | | 3 |
| Inputs | VI | -0.5 | | | V | | 3 |
| Output | VO | -0.5 | | | V | | 3 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 3 |
| ESD Protection (Input) | | 2000 | | | V | HBM | 3 |
| Positive Supply Voltage (3.3V option) | VDD | 3 | 3.3 | 3.6 | V | VDD = 3.3V ± 0.3V or 2.5V ± 5%, TA = -40°C to 85°C | 3 |
| Positive Supply Voltage (2.5V option) | VDD | 2.375 | 2.5 | 2.625 | V | VDD = 3.3V ± 0.3V or 2.5V ± 5%, TA = -40°C to 85°C | 3 |
| Output High Voltage (VDD = 3.6V) | VOH | 2.6 | | 3.6 | V | VDD = 3.6V; NOTE 1 | 3 |
| Output High Voltage (VDD = 2.625V) | VOH | 1.8 | | 2.625 | V | VDD = 2.625V; NOTE 1 | 3 |
| Peak-to-Peak Input Voltage | VPP | 0.15 | | 1.3 | V | | 3 |
| Output Low Voltage | VOL | | 0.5 | | V | VDD = 3.6V or 2.625V; NOTE 1 | 3 |
| Input High Current nCLK | IIH | | 5 | | μA | nCLK VIN = VDD = 3.6V or 2.625V | 3 |
| Input High Current CLK | IIH | | 150 | | μA | CLK VIN = VDD = 3.6V or 2.625V | 3 |
| Input Low Current nCLK | IIL | | -150 | | μA | nCLK VIN = 0V, VDD = 3.6V or 2.625V | 3 |
| Input Low Current CLK | IIL | | -5 | | μA | CLK VIN = 0V, VDD = 3.6V or 2.625V | 3 |
| Power Supply Current (25MHz) | IDD | | 25 | | mA | 25MHz, unloaded | 3 |
| Power Supply Current (250MHz) | IDD | | 35 | | mA | 250MHz, unloaded | 3 |
| Output Frequency (2.5V) | fMAX | 4 | | 360 | MHz | VDD = 2.5V ± 5%, TA = -40°C to 85°C | 4 |
| Propagation Delay (2.5V) | tPD | 1.9 | 2.2 | 2.5 | ns | VDD = 2.5V ± 5%; ƒ ≤ 350MHz | 4 |
| Part-to-Part Skew (2.5V) | tsk(pp) | | | 500 | ps | VDD = 2.5V ± 5% | 4 |
| Output Duty Cycle (2.5V, ƒ ≤ 250MHz) | odc | 45 | 50 | 55 | % | VDD = 2.5V ± 5%; ƒ ≤ 250MHz | 4 |
| Output Duty Cycle (2.5V, 250MHz < ƒ ≤ 350MHz) | odc | 40 | 50 | 60 | % | VDD = 2.5V ± 5%; 250MHz < ƒ ≤ 350MHz | 4 |
| Buffer Additive Phase Jitter, RMS (2.5V, 156.25MHz) | tjit | | 0.04 | | ps | VDD = 2.5V ± 5%; 156.25MHz, Integration Range (12kHz, 20MHz) | 4 |
| Buffer Additive Phase Jitter, RMS (2.5V, 125MHz) | tjit | | 0.14 | | ps | VDD = 2.5V ± 5%; 125MHz, Integration Range (12kHz, 20MHz) | 4 |
| Output Rise/Fall Time (2.5V) | tR/tF | | 180 | 350 | ps | VDD = 2.5V ± 5%; 20% to 80% | 4 |
| Output Frequency (3.3V) | fMAX | 4 | | 360 | MHz | VDD = 3.3V ± 0.3V, TA = -40°C to 85°C | 4 |
| Propagation Delay (3.3V) | tPD | 1.6 | 1.8 | 2 | ns | VDD = 3.3V ± 0.3V; ƒ ≤ 350MHz | 4 |
| Part-to-Part Skew (3.3V) | tsk(pp) | | | 500 | ps | VDD = 3.3V ± 0.3V | 4 |
| Output Duty Cycle (3.3V, ƒ ≤ 166MHz) | odc | 45 | 50 | 55 | % | VDD = 3.3V ± 0.3V; ƒ ≤ 166MHz | 4 |
| Output Duty Cycle (3.3V, 166MHz < ƒ ≤ 350MHz) | odc | 40 | 50 | 60 | % | VDD = 3.3V ± 0.3V; 166MHz < ƒ ≤ 350MHz | 4 |
| Output Rise/Fall Time (3.3V) | tR/tF | 80 | 250 | 350 | ps | VDD = 3.3V ± 0.3V; 0.8V to 2V | 4 |
| Buffer Additive Phase Jitter, RMS (3.3V, 156.25MHz) | tjit | | 0.09 | | ps | VDD = 3.3V ± 0.3V; 156.25MHz, Integration Range (12kHz, 20MHz) | 4 |
| Buffer Additive Phase Jitter, RMS (3.3V, 125MHz) | tjit | | 0.15 | | ps | VDD = 3.3V ± 0.3V; 125MHz, Integration Range (12kHz, 20MHz) | 4 |
| Input Capacitance | CIN | | 4 | | pF | | 2 |
| Input Pullup Resistor | RPULLUP | | 51 | | kΩ | | 2 |
| Input Pulldown Resistor | RPULLDOWN | | 51 | | kΩ | | 2 |
| Power Dissipation Capacitance | CPD | | 23 | | pF | VDD = 3.6V | 2 |
| Output Impedance | ROUT | 5 | 7 | 13 | Ω | | 2 |
| Package Thermal Impedance, θJA | θJA | | 103 | | °C/W | 0 lfpm | 3 |
| Junction-to-ambient thermal resistance | ΘJA | | 157 | | °C/W | Still air | 5 |
| Junction-to-case thermal resistance | ΘJC | | 42 | | °C/W | | 5 |
## CAD (KiCad official)
- Symbol: `PI6C49X0201WIEX`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `pi6c49x0201wiex-etched.step` / `pi6c49x0201wiex-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pi6c49x0201wiex.step` / `pi6c49x0201wiex.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](docs/pi6c49x0201wiex-datasheet.pdf) (6 pp, sha256 `6543420a15a9a9af`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pi6c49x0201wiex-datasheet.pdf)