# PDTD123TT

**Nexperia** · Digital Transistors · SOT-23

PDTD123TT from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | input (base) | input | Input (base) of the NPN transistor, connected to the internal bias resistor R1 (2.2 kΩ typical, 1.54 kΩ to 2.86 kΩ), with R2 left open. |
| 2 | GND (emitter) | power_in | Ground (emitter) reference terminal of the NPN transistor; the datasheet gives no further electrical limit for this pin. |
| 3 | output (collector) | output | Output (collector) of the transistor, rated for 500 mA output current with a collector-emitter voltage of 50 V maximum (open base). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| collector-base voltage (open emitter) | VCBO |  |  | 50 | V | open emitter | 4 |
| collector-emitter voltage (open base) | VCEO |  |  | 50 | V | open base | 4 |
| emitter-base voltage (open collector) | VEBO |  |  | 5 | V | open collector | 4 |
| input voltage, positive | VI |  |  | 12 | V | positive | 4 |
| input voltage, negative | VI |  |  | -5 | V | negative | 4 |
| output current | IO |  |  | 500 | mA |  | 4 |
| total power dissipation (SOT23) | Ptot |  |  | 250 | mW | Tamb ≤ 25 °C; device mounted on FR4 PCB, standard footprint | 4 |
| storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| junction temperature | Tj |  |  | 150 | °C |  | 4 |
| ambient temperature | Tamb | -65 |  | 150 | °C |  | 4 |
| thermal resistance from junction to ambient (SOT23) | Rth(j-a) |  |  | 500 | K/W | in free air; device mounted on FR4 PCB, single-sided copper, tin-plated, standard footprint | 5 |
| collector-base cut-off current | ICBO |  |  | 100 | nA | VCB = 40 V; IE = 0 A; Tamb = 25 °C | 5 |
| collector-emitter cut-off current | ICEO |  |  | 0.5 | μA | VCE = 50 V; IB = 0 A; Tamb = 25 °C | 5 |
| emitter-base cut-off current | IEBO |  |  | 100 | nA | VEB = 5 V; IC = 0 A; Tamb = 25 °C | 5 |
| DC current gain | hFE | 100 | 300 |  | - | VCE = 5 V; IC = 50 mA; Tamb = 25 °C | 5 |
| collector-emitter saturation voltage | VCEsat |  |  | 0.3 | V | IC = 50 mA; IB = 2.5 mA; Tamb = 25 °C | 5 |
| bias resistor 1 (input) | R1 | 1.54 | 2.2 | 2.86 | kΩ | R2 = open; Tamb = 25 °C | 5 |

## CAD (KiCad official)

- Symbol: `PDTD123TT`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `pdtd123tt-etched.step` / `pdtd123tt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pdtd123tt.step` / `pdtd123tt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586189886067630080) (11 pp, sha256 `a42e78e1da5fd34f`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pdtd123tt-datasheet.pdf)