component

PDTC114YU

Public Made by Adom

by adom

Nexperia Digital Transistors, SOT-323. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorspdtc114yu
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs pdtc114yu: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pdtc114yu: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json pdtc114yu: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
pdtc114yu-etched.fit.json pdtc114yu: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
pdtc114yu-etched.glb pdtc114yu: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
pdtc114yu-etched.step pdtc114yu: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
pdtc114yu.glb Publish 0.1.0 · Ray 1mo ago
pdtc114yu.kicad_mod Publish 0.1.0 · Ray 1mo ago
pdtc114yu.kicad_sym Publish 0.1.0 · Ray 1mo ago
pdtc114yu.lbr Publish 0.1.0 · Ray 1mo ago
pdtc114yu.step Publish 0.1.0 · Ray 1mo ago
README.md pdtc114yu: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

PDTC114YU

Nexperia · Digital Transistors · SOT-323

PDTC114YU from Nexperia, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base). Connects through the internal R1 = 10 kΩ series bias resistor to the base of the NPN transistor, with internal R2 = 47 kΩ shunt to GND. Off-state input voltage max 0.5 V; on-state input voltage min 1.4 V. Absolute max input voltage range -6 V to +40 V.
2 GND passive Ground (emitter). Emitter of the internal NPN transistor and the return leg of the R2 bias resistor; tie to circuit ground/common.
3 O output Output (collector) of the internal NPN transistor. Open-collector switching output rated 50 V VCEO / 100 mA IO, VCEsat ≤ 100 mV at IC = 5 mA, IB = 0.25 mA.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-323
Category Transistors/Thyristors
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PDTC114YU

CAD (KiCad official)

  • Symbol: PDTC114YU
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: pdtc114yu-etched.step / pdtc114yu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtc114yu.step / pdtc114yu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (10 pp, sha256 009c88eea79d14d0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF