component
PD70101ILQ-TR
Public Made by Adomby adom
Microchip Tech Power Over Ethernet (PoE) Controllers, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "pd70101ilq-tr",
"version": "0.1.0",
"type": "component",
"description": "Microchip Tech Power Over Ethernet (PoE) Controllers, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"pd70101ilq-tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"pd70101ilq-tr.step",
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"docs/pd70101ilq-tr-datasheet.pdf",
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],
"component": {
"mpn": "PD70101ILQ-TR",
"manufacturer": "Microchip Tech",
"package": "QFN-32(5x5)",
"pin_count": 33,
"category": "Power Management (PMIC)",
"subcategory": "Power Over Ethernet (PoE) Controllers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/9687138376367bb1f17fb08f5df577de.pdf",
"parts": {
"symbol": "pd70101ilq-tr.kicad_sym",
"footprint": "pd70101ilq-tr.kicad_mod",
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"model_3d_plain": "pd70101ilq-tr-etched.glb",
"model_3d_step": "pd70101ilq-tr-etched.step",
"model_3d_step_plain": "pd70101ilq-tr.step",
"lbr": "pd70101ilq-tr.lbr"
},
"distributor_links": {
"lcsc": "C3189208",
"digikey": "PD70101ILQTR-ND",
"mouser": "494-PD70101"
},
"distributor_check": {
"checked_at": "2026-11-02T18:02:55Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "PD70101ILQTR-ND",
"status": "found"
},
"mouser": {
"pn": "494-PD70101",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "RDET",
"type": "passive",
"description": "Connect a 24.9 kΩ, 1% detection resistor from this pin to VPP."
},
{
"number": "2",
"name": "PGOOD",
"type": "output",
"description": "Open-drain active-low output that flags the power rails (VPN_OUT) are ready, with the MOSFET rated for 5 mA and pull-up to VPP."
},
{
"number": "3",
"name": "RREF",
"type": "passive",
"description": "Connect a 240k 1% bias resistor between this pin and VPN_IN for the PD interface."
},
{
"number": "4",
"name": "RCLASS",
"type": "passive",
"description": "Connect an external classification resistor between this pin and VPN_IN to set the power class."
},
{
"number": "5",
"name": "VPN_IN",
"type": "power_in",
"description": "VPort negative input connected to the isolation switch N-channel MOSFET source."
},
{
"number": "6",
"name": "N/C",
"type": "unconnected",
"description": "Not used."
},
{
"number": "7",
"name": "N/C",
"type": "unconnected",
"description": "Not used on PD70101; AT_FLAG open-drain output (active low) is a PD70201 function."
},
{
"number": "8",
"name": "VPN_OUT",
"type": "power_out",
"description": "VPort negative output connected to the isolation switch output and N-channel MOSFET drain."
},
{
"number": "9",
"name": "N/C",
"type": "unconnected",
"description": "Not used."
},
{
"number": "10",
"name": "ENABLE",
"type": "input",
"description": "Logic-level enable input for the DC-DC controller, turned on by pulling this pin to VL, with thresholds VHI 2.0 V and VLO 0.8 V."
},
{
"number": "11",
"name": "VINS",
"type": "input",
"description": "VPP input voltage sensing for the UVLO comparator, connected through an external divider from VPP to GND with a 1.2 V threshold."
},
{
"number": "12",
"name": "HYST",
"type": "passive",
"description": "Output of the VINS/UVLO comparator used to program VPP UVLO hysteresis."
},
{
"number": "13",
"name": "SYNC",
"type": "input",
"description": "External clock synchronization input that sets the DC-DC switching frequency to the applied clock."
},
{
"number": "14",
"name": "RFREQ",
"type": "passive",
"description": "Connect a resistor from this pin to GND to set the DC-DC switching frequency."
},
{
"number": "15",
"name": "SS",
"type": "passive",
"description": "Connect a capacitor from this pin to GND to set the DC-DC soft-start time, charged to 1.2 V."
},
{
"number": "16",
"name": "RCLP",
"type": "passive",
"description": "Connect a resistor to GND to program the low power mode clamp voltage, or tie to GND to disable LPM."
},
{
"number": "17",
"name": "VSN",
"type": "input",
"description": "Negative input of the differential amplifier, connected to the resistor divider junction from Vo- to GND."
},
{
"number": "18",
"name": "VSP",
"type": "input",
"description": "Positive input of the differential amplifier, connected to the resistor divider junction from Vo+ to GND."
},
{
"number": "19",
"name": "COMP",
"type": "output",
"description": "Error amplifier output, shorted to FB for isolated converters or connected to FB via RC compensation for non-isolated converters."
},
{
"number": "20",
"name": "DAO",
"type": "output",
"description": "Differential amplifier output, connected to FB externally for non-isolated direct buck converter."
},
{
"number": "21",
"name": "FB",
"type": "input",
"description": "Inverting input of the error amplifier, connected to the optocoupler for isolated DC-DC or to RC compensation for non-isolated DC-DC."
},
{
"number": "22",
"name": "GND",
"type": "power_in",
"description": "Analog ground, connected to a local AGND plane with the soft-start capacitor and frequency resistor returned to it."
},
{
"number": "23",
"name": "VL",
"type": "power_out",
"description": "5 V (GND referenced) internal LDO output that requires a 1 µF or higher ceramic capacitor to GND."
},
{
"number": "24",
"name": "SG",
"type": "output",
"description": "Secondary gate driver output, the complement of PG, left open if unused and low in low power skip mode."
},
{
"number": "25",
"name": "PGND",
"type": "power_in",
"description": "Power ground connected to a local PGND plane for VCC decoupling, PG and SG drivers, and the primary current sense return."
},
{
"number": "26",
"name": "CSN",
"type": "input",
"description": "Negative input of the current sense amplifier, Kelvin connected to the PGND side of the primary current sense resistor."
},
{
"number": "27",
"name": "CSP",
"type": "input",
"description": "Positive input of the current sense amplifier, Kelvin connected to the non-PGND side of the primary current sense resistor."
},
{
"number": "28",
"name": "PG",
"type": "output",
"description": "Primary gate driver output connected to the gate of the primary side power MOSFET, directly or via a resistor."
},
{
"number": "29",
"name": "VH",
"type": "power_out",
"description": "5 V high-side (VCC referenced) internal LDO output that requires a 0.1 µF or higher ceramic capacitor to VCC."
},
{
"number": "30",
"name": "VCC",
"type": "power_in",
"description": "Input supply to the DC-DC controller that requires a 4.7 µF or higher ceramic capacitor to PGND."
},
{
"number": "31",
"name": "VAUX",
"type": "power_out",
"description": "Auxiliary voltage reference to VPN_OUT used for DC-DC start-up, connected directly to VCC for PoE-only power or through a 30 V schottky diode for multiple sources."
},
{
"number": "32",
"name": "VPP",
"type": "power_in",
"description": "Positive terminal of the PoE input port, connected to the positive terminal of the input bridges on the CDET positive side."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin rows are taken from PD70101 column of Table 3-1 (pages 15-17). Pins 6, 7 and 9 are N/C for PD701"
],
"pages_sent": 16,
"cost_usd": 0.03,
"at": "2026-11-02T18:02:46"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/9687138376367bb1f17fb08f5df577de.pdf",
"pages": 31,
"sha256": "25d7605430c73dad",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
},
"models_3d": [
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"up": "Z",
"units": "mm",
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-11-02",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "pd70101ilq-tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"footprint_binding": "identity",
"sha256": "0a6ebf940660a141f0a866be362aad8c8f31918d69fbb183d855c6868efa2cc8",
"checked": "2026-11-02",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}