component
PCM4202DBR
Public Made by Adomby adom
Texas Instruments ADCs/DACs - Special Purpose, SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPCM4202DBR
Texas Instruments · ADCs/DACs - Special Purpose · SSOP-28
PCM4202DBR from Texas Instruments, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VREFL | output | Left channel voltage reference output; connect 0.1µF X7R ceramic and 33µF tantalum decoupling capacitors to AGNDL; unbuffered output, do not use to bias external circuitry. |
| 2 | AGNDL | power_in | Left channel reference ground; connect to analog ground plane. |
| 3 | VCOML | output | Left channel DC common-mode voltage output, 2.5V typical; use for biasing external input buffer circuitry with load greater than 1MΩ impedance or buffer with voltage follower. |
| 4 | VINL+ | input | Left channel non-inverting analog input; accepts 6.0VPP full-scale differential input corresponding to 2.12VRMS; 3kΩ average input impedance. |
| 5 | VINL− | input | Left channel inverting analog input; accepts 6.0VPP full-scale differential input corresponding to 2.12VRMS; 3kΩ average input impedance. |
| 6 | FMT0 | input | Audio data format selection control pin; digital input for I2S, left-justified, or right-justified format selection. |
| 7 | FMT1 | input | Audio data format selection control pin; digital input for I2S, left-justified, or right-justified format selection. |
| 8 | S/M | input | Audio serial port slave/master mode selection; 0 selects Master mode, 1 selects Slave mode. |
| 9 | FS0 | input | Sampling mode selection control input; used with FS1 and FS2 to configure PCM sampling rate or DSD output data rate. |
| 10 | FS1 | input | Sampling mode selection control input; used with FS0 and FS2 to configure PCM sampling rate or DSD output data rate. |
| 11 | FS2 | input | Sampling mode selection control input; used with FS0 and FS1 to configure PCM sampling rate or DSD output data rate. |
| 12 | HPFD | input | High-pass filter disable control input; active high to disable digital high-pass filter for DC removal in PCM mode. |
| 13 | DGND | power_in | Digital ground; connect to digital power supply ground plane. |
| 14 | VDD | power_in | Digital power supply input, +3.3V nominal. |
| 15 | DATA/DSDR | output | Audio serial port output for 24-bit linear PCM left and right channel data or right channel 1-bit DSD data. |
| 16 | BCK/DSDL | bidirectional | Audio serial port bit clock input in slave mode, bit clock output in master mode; alternatively left channel DSD data output when in DSD mode. |
| 17 | LRCK/DSDBCK | bidirectional | Audio serial port left/right clock input in slave mode, word clock output in master mode; alternatively DSD data clock output when in DSD mode. |
| 18 | SCKI | input | System clock input; external clock required to derive modulator oversampling and digital subsystem clocks; frequency determines PCM sampling rate and DSD data rate. |
| 19 | RST | input | Reset/power-down control input, active low with internal pull-up resistor; used for asynchronous reset and power-down mode operation. |
| 20 | CLIPR | output | Right channel clipping flag output, active high; indicates output clipping has occurred in PCM output mode. |
| 21 | CLIPL | output | Left channel clipping flag output, active high; indicates output clipping has occurred in PCM output mode. |
| 22 | VCC | power_in | Analog power supply input, +5V nominal; required for analog signal path and delta-sigma modulator operation. |
| 23 | AGND | power_in | Analog ground; connect to analog power supply ground plane. |
| 24 | VINR− | input | Right channel inverting analog input; accepts 6.0VPP full-scale differential input corresponding to 2.12VRMS; 3kΩ average input impedance. |
| 25 | VINR+ | input | Right channel non-inverting analog input; accepts 6.0VPP full-scale differential input corresponding to 2.12VRMS; 3kΩ average input impedance. |
| 26 | VCOMR | output | Right channel DC common-mode voltage output, 2.5V typical; use for biasing external input buffer circuitry with load greater than 1MΩ impedance or buffer with voltage follower. |
| 27 | AGNDR | power_in | Right channel reference ground; connect to analog ground plane. |
| 28 | VREFR | output | Right channel voltage reference output; connect 0.1µF X7R ceramic and 33µF tantalum decoupling capacitors to AGNDR; unbuffered output, do not use to bias external circuitry. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-28 |
| Category | Data Acquisition |
| Pins | 28 |
CAD (KiCad official)
- Symbol:
PCM4202DBR - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28 (KiCad packages3D, STEP)
- 3D model files:
pcm4202dbr-etched.step/pcm4202dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pcm4202dbr.step/pcm4202dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
1b228e85a19f451f, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).