component
PCM3002E
Public Made by Adomby adom
Texas Instruments Audio Interface ICs, SSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PCM3002E
Texas Instruments · Audio Interface ICs · SSOP-24
PCM3002E from Texas Instruments, in a SSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |
| 2 | VCC1 | power_in | ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions; second VCC1 pin. |
| 3 | VINR | input | ADC analog input, Rch; full-scale input is 1.8 Vp-p at VCC = 3 V. |
| 4 | VREF1 | passive | ADC reference 1 pin; no limits are stated in the datasheet. |
| 5 | VREF2 | passive | ADC reference 2 pin; no limits are stated in the datasheet. |
| 6 | VINL | input | ADC analog input, Lch; full-scale input is 1.8 Vp-p at VCC = 3 V. |
| 7 | RST | input | Reset input, active LOW; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 8 | ML | input | Strobe pulse for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 9 | SYSCLK | input | System clock input, 8.192 MHz to 24.576 MHz; Schmitt-trigger input. |
| 10 | LRCIN | input | Sample rate clock input (fs), 32 kHz to 48 kHz; Schmitt-trigger input. |
| 11 | BCKIN | input | Bit clock input; Schmitt-trigger input. |
| 12 | DOUT | output | Data output; digital output load capacitance is limited to 10 pF. |
| 13 | DGND | power_in | Digital ground. |
| 14 | VDD | power_in | Digital power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |
| 15 | DIN | input | Data input; Schmitt-trigger input. |
| 16 | ZFLG | output | Zero flag output, active LOW; open-drain output. |
| 17 | MD | input | Serial data for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 18 | MC | input | Bit clock for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 19 | VOUTL | output | DAC analog output, Lch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance. |
| 20 | VOUTR | output | DAC analog output, Rch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance. |
| 21 | VCOM | passive | ADC/DAC common pin; no limits are stated in the datasheet. |
| 22 | AGND2 | power_in | DAC analog ground. |
| 23 | AGND1 | power_in | ADC analog ground. |
| 24 | VCC2 | power_in | DAC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24 |
| Category | Interface |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
PCM3002E - Footprint:
Package_SO:SSOP-24_5.3x8.2mm_P0.65mm - 3D model: SSOP-24 (KiCad packages3D, STEP)
- 3D model files:
pcm3002e-etched.step/pcm3002e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pcm3002e.step/pcm3002e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
6ec2a2598c16c750, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PCM3002E
**Texas Instruments** · Audio Interface ICs · SSOP-24
PCM3002E from Texas Instruments, in a SSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |
| 2 | VCC1 | power_in | ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions; second VCC1 pin. |
| 3 | VINR | input | ADC analog input, Rch; full-scale input is 1.8 Vp-p at VCC = 3 V. |
| 4 | VREF1 | passive | ADC reference 1 pin; no limits are stated in the datasheet. |
| 5 | VREF2 | passive | ADC reference 2 pin; no limits are stated in the datasheet. |
| 6 | VINL | input | ADC analog input, Lch; full-scale input is 1.8 Vp-p at VCC = 3 V. |
| 7 | RST | input | Reset input, active LOW; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 8 | ML | input | Strobe pulse for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 9 | SYSCLK | input | System clock input, 8.192 MHz to 24.576 MHz; Schmitt-trigger input. |
| 10 | LRCIN | input | Sample rate clock input (fs), 32 kHz to 48 kHz; Schmitt-trigger input. |
| 11 | BCKIN | input | Bit clock input; Schmitt-trigger input. |
| 12 | DOUT | output | Data output; digital output load capacitance is limited to 10 pF. |
| 13 | DGND | power_in | Digital ground. |
| 14 | VDD | power_in | Digital power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |
| 15 | DIN | input | Data input; Schmitt-trigger input. |
| 16 | ZFLG | output | Zero flag output, active LOW; open-drain output. |
| 17 | MD | input | Serial data for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 18 | MC | input | Bit clock for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |
| 19 | VOUTL | output | DAC analog output, Lch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance. |
| 20 | VOUTR | output | DAC analog output, Rch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance. |
| 21 | VCOM | passive | ADC/DAC common pin; no limits are stated in the datasheet. |
| 22 | AGND2 | power_in | DAC analog ground. |
| 23 | AGND1 | power_in | ADC analog ground. |
| 24 | VCC2 | power_in | DAC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24 |
| Category | Interface |
| Pins | 24 |
## CAD (KiCad official)
- Symbol: `PCM3002E`
- Footprint: `Package_SO:SSOP-24_5.3x8.2mm_P0.65mm`
- 3D model: SSOP-24 (KiCad packages3D, STEP)
- 3D model files: `pcm3002e-etched.step` / `pcm3002e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pcm3002e.step` / `pcm3002e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/pcm3003) (40 pp, sha256 `6ec2a2598c16c750`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pcm3002e-datasheet.pdf)