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Initial commit: component/pcm3002e

Ray ·dbe12be5b7 ·1d ago
2 files changed +356
README.mdadded+60
@@ -0,0 +1,60 @@+# PCM3002E++**Texas Instruments** · Audio Interface ICs · SSOP-24++PCM3002E from Texas Instruments, in a SSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC1 | power_in | ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |+| 2 | VCC1 | power_in | ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions; second VCC1 pin. |+| 3 | VINR | input | ADC analog input, Rch; full-scale input is 1.8 Vp-p at VCC = 3 V. |+| 4 | VREF1 | passive | ADC reference 1 pin; no limits are stated in the datasheet. |+| 5 | VREF2 | passive | ADC reference 2 pin; no limits are stated in the datasheet. |+| 6 | VINL | input | ADC analog input, Lch; full-scale input is 1.8 Vp-p at VCC = 3 V. |+| 7 | RST | input | Reset input, active LOW; Schmitt-trigger input with 100-kΩ typical internal pulldown. |+| 8 | ML | input | Strobe pulse for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |+| 9 | SYSCLK | input | System clock input, 8.192 MHz to 24.576 MHz; Schmitt-trigger input. |+| 10 | LRCIN | input | Sample rate clock input (fs), 32 kHz to 48 kHz; Schmitt-trigger input. |+| 11 | BCKIN | input | Bit clock input; Schmitt-trigger input. |+| 12 | DOUT | output | Data output; digital output load capacitance is limited to 10 pF. |+| 13 | DGND | power_in | Digital ground. |+| 14 | VDD | power_in | Digital power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |+| 15 | DIN | input | Data input; Schmitt-trigger input. |+| 16 | ZFLG | output | Zero flag output, active LOW; open-drain output. |+| 17 | MD | input | Serial data for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |+| 18 | MC | input | Bit clock for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown. |+| 19 | VOUTL | output | DAC analog output, Lch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance. |+| 20 | VOUTR | output | DAC analog output, Rch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance. |+| 21 | VCOM | passive | ADC/DAC common pin; no limits are stated in the datasheet. |+| 22 | AGND2 | power_in | DAC analog ground. |+| 23 | AGND1 | power_in | ADC analog ground. |+| 24 | VCC2 | power_in | DAC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SSOP-24 |+| Category | Interface |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `PCM3002E`+- Footprint: `Package_SO:SSOP-24_5.3x8.2mm_P0.65mm`+- 3D model: SSOP-24 (KiCad packages3D, STEP)+- 3D model files: `pcm3002e-etched.step` / `pcm3002e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pcm3002e.step` / `pcm3002e.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/pcm3003) (40 pp, sha256 `6ec2a2598c16c750`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/pcm3002e-datasheet.pdf)
page.jsonadded+296
@@ -0,0 +1,296 @@+{+  "slug": "pcm3002e",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Audio Interface ICs, SSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "pcm3002e",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "pcm3002e.kicad_sym",+    "pcm3002e.kicad_mod",+    "pcm3002e.glb",+    "pcm3002e.step",+    "pcm3002e.lbr",+    "docs/hero.png",+    "docs/pcm3002e-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "pcm3002e-hero.glb",+    "pcm3002e-hero.overlay.json"+  ],+  "component": {+    "mpn": "PCM3002E",+    "manufacturer": "Texas Instruments",+    "package": "SSOP-24",+    "pin_count": 24,+    "category": "Interface",+    "subcategory": "Audio Interface ICs",+    "datasheet": "https://www.ti.com/cn/lit/gpn/pcm3003",+    "parts": {+      "symbol": "pcm3002e.kicad_sym",+      "footprint": "pcm3002e.kicad_mod",+      "model_3d": "pcm3002e-hero.glb",+      "model_3d_plain": "pcm3002e.glb",+      "model_3d_step": "pcm3002e-etched.step",+      "model_3d_step_plain": "pcm3002e.step",+      "lbr": "pcm3002e.lbr"+    },+    "distributor_links": {+      "lcsc": "C2861183",+      "digikey": "2156-PCM3002E-ND",+      "mouser": "595-PCM3002E"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T16:20:31Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-PCM3002E-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-PCM3002E",+        "status": "found",+        "lifecycle": "End of Life"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VCC1",+        "type": "power_in",+        "description": "ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions."+      },+      {+        "number": "2",+        "name": "VCC1",+        "type": "power_in",+        "description": "ADC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions; second VCC1 pin."+      },+      {+        "number": "3",+        "name": "VINR",+        "type": "input",+        "description": "ADC analog input, Rch; full-scale input is 1.8 Vp-p at VCC = 3 V."+      },+      {+        "number": "4",+        "name": "VREF1",+        "type": "passive",+        "description": "ADC reference 1 pin; no limits are stated in the datasheet."+      },+      {+        "number": "5",+        "name": "VREF2",+        "type": "passive",+        "description": "ADC reference 2 pin; no limits are stated in the datasheet."+      },+      {+        "number": "6",+        "name": "VINL",+        "type": "input",+        "description": "ADC analog input, Lch; full-scale input is 1.8 Vp-p at VCC = 3 V."+      },+      {+        "number": "7",+        "name": "RST",+        "type": "input",+        "description": "Reset input, active LOW; Schmitt-trigger input with 100-kΩ typical internal pulldown."+      },+      {+        "number": "8",+        "name": "ML",+        "type": "input",+        "description": "Strobe pulse for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown."+      },+      {+        "number": "9",+        "name": "SYSCLK",+        "type": "input",+        "description": "System clock input, 8.192 MHz to 24.576 MHz; Schmitt-trigger input."+      },+      {+        "number": "10",+        "name": "LRCIN",+        "type": "input",+        "description": "Sample rate clock input (fs), 32 kHz to 48 kHz; Schmitt-trigger input."+      },+      {+        "number": "11",+        "name": "BCKIN",+        "type": "input",+        "description": "Bit clock input; Schmitt-trigger input."+      },+      {+        "number": "12",+        "name": "DOUT",+        "type": "output",+        "description": "Data output; digital output load capacitance is limited to 10 pF."+      },+      {+        "number": "13",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Digital power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions."+      },+      {+        "number": "15",+        "name": "DIN",+        "type": "input",+        "description": "Data input; Schmitt-trigger input."+      },+      {+        "number": "16",+        "name": "ZFLG",+        "type": "output",+        "description": "Zero flag output, active LOW; open-drain output."+      },+      {+        "number": "17",+        "name": "MD",+        "type": "input",+        "description": "Serial data for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown."+      },+      {+        "number": "18",+        "name": "MC",+        "type": "input",+        "description": "Bit clock for mode control; Schmitt-trigger input with 100-kΩ typical internal pulldown."+      },+      {+        "number": "19",+        "name": "VOUTL",+        "type": "output",+        "description": "DAC analog output, Lch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance."+      },+      {+        "number": "20",+        "name": "VOUTR",+        "type": "output",+        "description": "DAC analog output, Rch; analog output load is 10 kΩ (AC coupling) and 30 pF maximum capacitance."+      },+      {+        "number": "21",+        "name": "VCOM",+        "type": "passive",+        "description": "ADC/DAC common pin; no limits are stated in the datasheet."+      },+      {+        "number": "22",+        "name": "AGND2",+        "type": "power_in",+        "description": "DAC analog ground."+      },+      {+        "number": "23",+        "name": "AGND1",+        "type": "power_in",+        "description": "ADC analog ground."+      },+      {+        "number": "24",+        "name": "VCC2",+        "type": "power_in",+        "description": "DAC analog power supply, 2.7 V to 3.6 V (3 V nominal) per the recommended operating conditions."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet pin assignment tables (pages 5-6) cover both PCM3002 and PCM3003, which share the SSOP; Pins 1 and 2 are both VCC1 and pins 1 and 2 are listed as one entry in the datasheet table; each is ; Pin types for VREF1, VREF2 and VCOM are not stated in the datasheet and were assigned as passive. ZF"+        ],+        "pages_sent": 10,+        "cost_usd": 0.0683,+        "at": "2026-10-08T16:20:08"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/pcm3003",+        "pages": 40,+        "sha256": "6ec2a2598c16c750",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 24,+        "described": 24,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "pcm3002e.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          7.8,+          8.2,+          2.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "77dd0a1fc7e70e9eda1bfde9dde937dc6e391803cff9978790523c850c85a21d",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "pcm3002e-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          7.8,+          8.2,+          2.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "cc6b1fc6e48c695914757a3fb5951905d093c129d11f713870227805ea784389",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file