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PCA9543ADR
Public Made by Adomby adom
Texas Instruments Analog Switches - Special Purpose, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPCA9543ADR
Texas Instruments · Analog Switches - Special Purpose · SOIC-14
PCA9543ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Hardware I2C slave address input bit 0. Tie directly to VCC or GND to select one of four possible device addresses on the upstream I2C bus. |
| 2 | A1 | input | Hardware I2C slave address input bit 1. Tie directly to VCC or GND to select one of four possible device addresses on the upstream I2C bus. |
| 3 | RESET | input | Active-low reset input. A low pulse (min 4 ns) resets the I2C state machine and deselects both downstream channels. Connect to VCC or VDPUM through a pull-up resistor if not used. |
| 4 | INT0 | input | Active-low interrupt input from downstream channel 0. Connect to VDPU0 through a pull-up resistor. ANDed with INT1 to drive the INT output. |
| 5 | SD0 | bidirectional | Downstream channel 0 serial data line. Bidirectional open-drain pass-gate connection to SDA when channel 0 is selected. Requires an external pull-up to VDPU0. |
| 6 | SC0 | bidirectional | Downstream channel 0 serial clock line. Bidirectional open-drain pass-gate connection to SCL when channel 0 is selected. Requires an external pull-up to VDPU0. |
| 7 | GND | power_in | Ground reference for the device. 0 V. |
| 8 | INT1 | input | Active-low interrupt input from downstream channel 1. Connect to VDPU1 through a pull-up resistor. ANDed with INT0 to drive the INT output. |
| 9 | SD1 | bidirectional | Downstream channel 1 serial data line. Bidirectional open-drain pass-gate connection to SDA when channel 1 is selected. Requires an external pull-up to VDPU1. |
| 10 | SC1 | bidirectional | Downstream channel 1 serial clock line. Bidirectional open-drain pass-gate connection to SCL when channel 1 is selected. Requires an external pull-up to VDPU1. |
| 11 | INT | output | Active-low interrupt output (open-drain) to the upstream I2C master. Asserted low when either INT0 or INT1 is asserted. Connect to VDPUM through a pull-up resistor. IOL up to 3 mA at VOL = 0.4 V. |
| 12 | SCL | bidirectional | Upstream I2C serial clock line from the master. Open-drain; supports 0 to 400 kHz operation. Connect to VDPUM through a pull-up resistor. |
| 13 | SDA | bidirectional | Upstream I2C serial data line to/from the master. Open-drain, 5.5 V tolerant. Connect to VDPUM through a pull-up resistor. |
| 14 | VCC | power_in | Positive supply voltage. Operating range 2.3 V to 5.5 V. VCC also sets the maximum pass-gate voltage for downstream channels, enabling level translation between mixed-voltage I2C buses. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Interface |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
PCA9543ADRPCA9543ADRDPCA9543ADRPWRPCA9543ADRPW
CAD (KiCad official)
- Symbol:
PCA9543ADR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
pca9543adr-etched.step/pca9543adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pca9543adr.step/pca9543adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
669f202b834328fd, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).