# NVGS5120PT1G

**onsemi** · MOSFETs · TSOP-6

NVGS5120PT1G from onsemi, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DRAIN | passive | Drain terminal of the P-channel MOSFET, rated for −60 V drain-to-source breakdown voltage V(BR)DSS. |
| 2 | DRAIN | passive | Drain terminal of the P-channel MOSFET, rated for −60 V drain-to-source breakdown voltage V(BR)DSS. |
| 3 | GATE | input | Gate terminal of the MOSFET; the gate-to-source voltage rating is ±20 V (VGS). |
| 4 | SOURCE | passive | Source terminal of the P-channel MOSFET, the reference terminal for the gate-to-source voltage VGS. |
| 5 | DRAIN | passive | Drain terminal of the P-channel MOSFET, rated for −60 V drain-to-source breakdown voltage V(BR)DSS. |
| 6 | DRAIN | passive | Drain terminal of the P-channel MOSFET, rated for −60 V drain-to-source breakdown voltage V(BR)DSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSOP-6 |
| Category | Transistors/Thyristors |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | -60 |  |  | V |  | 1 |
| Gate-to-Source Voltage | VGS |  |  | 20 | V |  | 1 |
| Continuous Drain Current (Note 1, steady state) | ID | -2.5 |  |  | A | TA = 25°C, steady state | 1 |
| Continuous Drain Current (Note 1, steady state) | ID | -2 |  |  | A | TA = 85°C, steady state | 1 |
| Continuous Drain Current (Note 1, t ≤ 5 s) | ID | -2.9 |  |  | A | t ≤ 5 s, TA = 25°C | 1 |
| Continuous Drain Current (Note 2, steady state) | ID | -1.8 |  |  | A | TA = 25°C, Note 2 minimum pad | 1 |
| Continuous Drain Current (Note 2, steady state) | ID | -1.3 |  |  | A | TA = 85°C, Note 2 minimum pad | 1 |
| Power Dissipation (Note 1, steady state) | PD |  |  | 1.1 | W | TA = 25°C, steady state | 1 |
| Power Dissipation (Note 1, t ≤ 5 s) | PD |  |  | 1.4 | W | t ≤ 5 s, TA = 25°C | 1 |
| Power Dissipation (Note 2) | PD |  |  | 0.6 | W | TA = 25°C, Note 2 minimum pad | 1 |
| Pulsed Drain Current | IDM | -20 |  |  | A | tp = 10 µs | 1 |
| Operating Junction and Storage Temperature | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Lead Temperature for Soldering Purposes | TL |  |  | 260 | °C | 1/8 in from case for 10 s | 1 |
| Junction-to-Ambient – Steady State (Note 3) | RθJA |  |  | 102 | °C/W | Steady state, 1 in² pad (Note 3) | 2 |
| Junction-to-Ambient – t = 5 s (Note 3) | RθJA |  |  | 77.6 | °C/W | t = 5 s, 1 in² pad (Note 3) | 2 |
| Junction-to-Ambient – Steady State (Note 4) | RθJA |  |  | 200 | °C/W | Steady state, minimum recommended pad (Note 4) | 2 |
| Drain-to-Source Breakdown Voltage | V(BR)DSS | -60 |  |  | V | VGS = 0 V, ID = −250 µA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | µA | VGS = 0 V, VDS = −48 V, TJ = 25°C | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -5 | µA | VGS = 0 V, VDS = −48 V, TJ = 125°C | 2 |
| Gate-to-Source Leakage Current | IGSS |  |  | 100 | nA | VDS = 0 V, VGS = ±12 V | 2 |
| Gate-to-Source Leakage Current | IGSS |  |  | 200 | nA | VDS = 0 V, VGS = ±20 V | 2 |
| Gate Threshold Voltage | VGS(TH) | -1 |  | -3 | V | VGS = VDS, ID = −250 µA | 2 |
| Drain-to-Source On Resistance | RDS(on) |  | 72 | 111 | mΩ | VGS = −10 V, ID = −2.9 A | 2 |
| Drain-to-Source On Resistance | RDS(on) |  | 88 | 142 | mΩ | VGS = −4.5 V, ID = −2.5 A | 2 |
| Forward Diode Voltage | VSD |  | -0.75 | -1 | V | VGS = 0 V, IS = −0.9 A, TJ = 25°C | 2 |

## CAD (KiCad official)

- Symbol: `NVGS5120PT1G`
- Footprint: `Package_SO:TSOP-6_1.65x3.05mm_P0.95mm`
- 3D model: TSOP-6 (KiCad packages3D, STEP)
- 3D model files: `nvgs5120pt1g-etched.step` / `nvgs5120pt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nvgs5120pt1g.step` / `nvgs5120pt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588949115477118976) (7 pp, sha256 `53fbfd0491e17613`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/nvgs5120pt1g-datasheet.pdf)