component
NVD5C688NLT4G
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UMW MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NVD5C688NLT4G
UMW · MOSFETs · TO-252
NVD5C688NLT4G from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE; gate-to-source voltage is rated at ±16 V continuous (absolute maximum ratings, TJ = 25°C). |
| 2 | D | passive | DRAIN; drain-to-source voltage is rated at 60 V (VDSS), with continuous drain current of 17 A at TC = 25°C per the absolute maximum ratings. |
| 3 | S | passive | SOURCE; the datasheet gives a source (body diode) current IS of 20 A, with no separate pin-specific limit stated. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | 60 | V | 1 | |||
| Gate-to-Source Voltage, Continuous | VGS | -16 | 16 | V | Continuous; printed as ±16 | 1 | |
| Continuous Drain Current | ID | 17 | A | TC=25°C, RθJC (Notes 1 & 3) | 1 | ||
| Continuous Drain Current | ID | 12 | A | TC=100°C, RθJC | 1 | ||
| Power Dissipation | PD | 18 | W | TC=25°C | 1 | ||
| Power Dissipation | PD | 9 | W | TC=100°C | 1 | ||
| Continuous Drain Current | ID | 7 | A | TA=25°C, steady state, RθJA (Notes 1, 2 & 3) | 1 | ||
| Continuous Drain Current | ID | 5 | A | TA=100°C, steady state, RθJA | 1 | ||
| Power Dissipation | PD | 2.9 | W | TA=25°C, steady state, RθJA (Notes 1 & 2) | 1 | ||
| Power Dissipation | PD | 1.45 | W | TA=100°C, steady state, RθJA | 1 | ||
| Pulsed Drain Current | IDM | 77 | A | TA=25°C, tp=10µs | 1 | ||
| Operating Junction and Storage Temperature | TJ,TSTG | -55 | 175 | °C | 1 | ||
| Source Current (Body Diode) | IS | 20 | A | 2 | |||
| Single Pulse Drain-to-Source Avalanche Energy | EAS | 48 | mJ | TJ=25°C, IL(pk)=1A | 2 | ||
| Lead Temperature for Soldering Purposes | TL | 260 | °C | 1/8 in from case for 10 s | 2 | ||
| Junction-to-Case (Drain) Thermal Resistance | RθJC | 8.05 | °C/W | Note 1 | 2 | ||
| Junction-to-Ambient Thermal Resistance, Steady State | RθJA | 51.6 | °C/W | Surface-mounted on FR4, 650 mm² 2 oz Cu pad (Note 2) | 2 | ||
| Drain-to-Source Breakdown Voltage | V(BR)DSS | 60 | V | VGS=0V, ID=250µA | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | µA | VDS=60V, TJ=25°C | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | 250 | µA | VDS=60V, TJ=125°C | 3 | ||
| Gate-to-Source Leakage Current | IGSS | 100 | nA | VDS=0V, VGS=20V | 3 | ||
| Gate Threshold Voltage | VGS(th) | 1.2 | 2.1 | V | VDS=VGS, ID=15µA | 3 | |
| Drain-to-Source On Resistance | RDS(ON) | 28 | mΩ | VGS=10V, ID=10A | 3 | ||
| Drain-to-Source On Resistance | RDS(ON) | 30 | mΩ | VGS=4.5V, ID=10A | 3 |
CAD (KiCad official)
- Symbol:
NVD5C688NLT4G - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
nvd5c688nlt4g-etched.step/nvd5c688nlt4g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nvd5c688nlt4g.step/nvd5c688nlt4g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (10 pp, sha256
91947a855dc32347, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NVD5C688NLT4G
**UMW** · MOSFETs · TO-252
NVD5C688NLT4G from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE; gate-to-source voltage is rated at ±16 V continuous (absolute maximum ratings, TJ = 25°C). |
| 2 | D | passive | DRAIN; drain-to-source voltage is rated at 60 V (VDSS), with continuous drain current of 17 A at TC = 25°C per the absolute maximum ratings. |
| 3 | S | passive | SOURCE; the datasheet gives a source (body diode) current IS of 20 A, with no separate pin-specific limit stated. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | | | 60 | V | | 1 |
| Gate-to-Source Voltage, Continuous | VGS | -16 | | 16 | V | Continuous; printed as ±16 | 1 |
| Continuous Drain Current | ID | | | 17 | A | TC=25°C, RθJC (Notes 1 & 3) | 1 |
| Continuous Drain Current | ID | | | 12 | A | TC=100°C, RθJC | 1 |
| Power Dissipation | PD | | | 18 | W | TC=25°C | 1 |
| Power Dissipation | PD | | | 9 | W | TC=100°C | 1 |
| Continuous Drain Current | ID | | | 7 | A | TA=25°C, steady state, RθJA (Notes 1, 2 & 3) | 1 |
| Continuous Drain Current | ID | | | 5 | A | TA=100°C, steady state, RθJA | 1 |
| Power Dissipation | PD | | | 2.9 | W | TA=25°C, steady state, RθJA (Notes 1 & 2) | 1 |
| Power Dissipation | PD | | | 1.45 | W | TA=100°C, steady state, RθJA | 1 |
| Pulsed Drain Current | IDM | | | 77 | A | TA=25°C, tp=10µs | 1 |
| Operating Junction and Storage Temperature | TJ,TSTG | -55 | | 175 | °C | | 1 |
| Source Current (Body Diode) | IS | | | 20 | A | | 2 |
| Single Pulse Drain-to-Source Avalanche Energy | EAS | | | 48 | mJ | TJ=25°C, IL(pk)=1A | 2 |
| Lead Temperature for Soldering Purposes | TL | | | 260 | °C | 1/8 in from case for 10 s | 2 |
| Junction-to-Case (Drain) Thermal Resistance | RθJC | | 8.05 | | °C/W | Note 1 | 2 |
| Junction-to-Ambient Thermal Resistance, Steady State | RθJA | | 51.6 | | °C/W | Surface-mounted on FR4, 650 mm² 2 oz Cu pad (Note 2) | 2 |
| Drain-to-Source Breakdown Voltage | V(BR)DSS | 60 | | | V | VGS=0V, ID=250µA | 3 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | µA | VDS=60V, TJ=25°C | 3 |
| Zero Gate Voltage Drain Current | IDSS | | | 250 | µA | VDS=60V, TJ=125°C | 3 |
| Gate-to-Source Leakage Current | IGSS | | | 100 | nA | VDS=0V, VGS=20V | 3 |
| Gate Threshold Voltage | VGS(th) | 1.2 | | 2.1 | V | VDS=VGS, ID=15µA | 3 |
| Drain-to-Source On Resistance | RDS(ON) | | | 28 | mΩ | VGS=10V, ID=10A | 3 |
| Drain-to-Source On Resistance | RDS(ON) | | | 30 | mΩ | VGS=4.5V, ID=10A | 3 |
## CAD (KiCad official)
- Symbol: `NVD5C688NLT4G`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `nvd5c688nlt4g-etched.step` / `nvd5c688nlt4g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nvd5c688nlt4g.step` / `nvd5c688nlt4g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755880527440429056) (10 pp, sha256 `91947a855dc32347`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/nvd5c688nlt4g-datasheet.pdf)