main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 21h ago
viewers nttfd4d0n04hltwg: viewers · Ray 21h ago
nttfd4d0n04hltwg-etched.glb Publish 0.1.0 · Ray 21h ago
nttfd4d0n04hltwg-etched.step nttfd4d0n04hltwg: factory component page (tier=mfr) · Ray 21h ago
nttfd4d0n04hltwg-hero.glb nttfd4d0n04hltwg: hero GLB from the etched model (keeps the MPN mark) · Ray 21h ago
nttfd4d0n04hltwg-hero.overlay.json Publish 0.1.0 · Ray 21h ago
nttfd4d0n04hltwg.glb Publish 0.1.0 · Ray 21h ago
nttfd4d0n04hltwg.kicad_mod Publish 0.1.0 · Ray 21h ago
nttfd4d0n04hltwg.kicad_sym Publish 0.1.0 · Ray 21h ago
nttfd4d0n04hltwg.lbr Publish 0.1.0 · Ray 21h ago
nttfd4d0n04hltwg.step Publish 0.1.0 · Ray 21h ago
package.json Publish 0.1.0 · Ray 21h ago
page.json Set visibility: public · Ray 21h ago
README.md Publish 0.1.0 · Ray 21h ago
verification.json Verified: Published by the parts factory: tier mfr, 13 pins · Ray 21h ago

NTTFD4D0N04HLTWG

onsemi · MOSFETs · WDFN-12

NTTFD4D0N04HLTWG from onsemi, in a WDFN-12. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND (LSS) power_in Low-side source of the synchronous MOSFET Q1, tied to ground; pins 1, 11 and 12 share this connection.
2 LSG input Low-side gate of the synchronous MOSFET Q1, with a gate-to-source rating of ±20 V.
3 V+ (HSD) power_in High-side drain of the control MOSFET Q2 and the V+ input connection, with a drain-to-source rating of 40 V.
4 V+ (HSD) power_in High-side drain of the control MOSFET Q2 and the V+ input connection, with a drain-to-source rating of 40 V.
5 V+ (HSD) power_in High-side drain of the control MOSFET Q2 and the V+ input connection, with a drain-to-source rating of 40 V.
6 V+ (HSD) power_in High-side drain of the control MOSFET Q2 and the V+ input connection, with a drain-to-source rating of 40 V.
7 HSG input High-side gate of the control MOSFET Q2, with a gate-to-source rating of ±20 V.
8 SW passive Switching node, which is the low-side drain of Q1 and is internally connected to the high-side source; pins 8, 9 and 10 share this node.
9 SW passive Switching node, which is the low-side drain of Q1 and is internally connected to the high-side source; pins 8, 9 and 10 share this node.
10 SW passive Switching node, which is the low-side drain of Q1 and is internally connected to the high-side source; pins 8, 9 and 10 share this node.
11 GND (LSS) power_in Low-side source of the synchronous MOSFET Q1, tied to ground; pins 1, 11 and 12 share this connection.
12 GND (LSS) power_in Low-side source of the synchronous MOSFET Q1, tied to ground; pins 1, 11 and 12 share this connection.
13 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package WDFN-12
Category Triode/MOS Tube/Transistor
Pins 13

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDS 40 V 2
Gate-to-Source Voltage VGS -20 20 V 2
Drain Current, Continuous ID 60 A TC = 25°C (Note 4) 2
Drain Current, Continuous ID 37 A TC = 100°C (Note 4) 2
Drain Current, Continuous ID 15 A TA = 25°C (Note 1a, Q1) 2
Drain Current, Pulsed ID 349 A TA = 25°C 2
Single Pulse Avalanche Energy EAS 67 mJ Note 3: starting TJ = 25°C, L = 1 mH, IAS = 11.6 A, VDD = 40 V, VGS = 10 V 2
Power Dissipation for Single Operation PD 26 W TC = 25°C 2
Power Dissipation for Single Operation PD 1.7 W TA = 25°C (Note 1a, Q1) 2
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 °C 2
Thermal Resistance, Junction-to-Case RJC 4.8 °C/W 2
Thermal Resistance, Junction-to-Ambient, max copper RJA 70 °C/W Note 1a: mounted on 1 in² pad of 2 oz copper 2
Thermal Resistance, Junction-to-Ambient, min copper RJA 135 °C/W Note 1a: mounted on minimum pad of 2 oz copper 2
Drain-to-Source Breakdown Voltage BVDSS 40 V ID = 250 A, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 A VDS = 40 V, VGS = 0 V 2
Gate-to-Source Leakage Current, Forward IGSS -100 100 nA VGS = +20/−16 V, VDS = 0 V 2
Gate-to-Source Threshold Voltage VGS(th) 1.2 1.5 2 V VGS = VDS, ID = 50 A 2
Drain-to-Source On Resistance rDS(on) 3.7 4.5 m VGS = 10 V, ID = 10 A 2
Drain-to-Source On Resistance rDS(on) 5.8 7 m VGS = 4.5 V, ID = 8 A 2
Source to Drain Diode Forward Voltage VSD 0.78 1.2 V VGS = 0 V, IS = 10 A (Note 2) 3

CAD (KiCad official)

  • Symbol: NTTFD4D0N04HLTWG
  • Footprint: Package_DFN_QFN:WDFN-12-1EP_3x3mm_P0.45mm_EP1.7x2.5mm
  • 3D model: WDFN-12 (KiCad packages3D, STEP)
  • 3D model files: nttfd4d0n04hltwg-etched.step / nttfd4d0n04hltwg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nttfd4d0n04hltwg.step / nttfd4d0n04hltwg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (9 pp, sha256 bc880a54daabf264, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF