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Ray Publish 0.1.0 9a17cbd 12d ago
{
  "slug": "nsi8122n1",
  "version": "0.1.0",
  "type": "component",
  "description": "NOVOSENSE Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "signal isolation devices",
    "nsi8122n1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "nsi8122n1.kicad_sym",
    "nsi8122n1.kicad_mod",
    "nsi8122n1.glb",
    "nsi8122n1.step",
    "nsi8122n1.lbr",
    "docs/hero.png",
    "docs/nsi8122n1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "nsi8122n1-hero.glb",
    "nsi8122n1-hero.overlay.json",
    "nsi8122n1-etched.glb"
  ],
  "component": {
    "mpn": "NSi8122N1",
    "manufacturer": "NOVOSENSE",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Signal Isolation Devices",
    "subcategory": "Digital Isolators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588905058348249088",
    "parts": {
      "symbol": "nsi8122n1.kicad_sym",
      "footprint": "nsi8122n1.kicad_mod",
      "model_3d": "nsi8122n1-hero.glb",
      "model_3d_plain": "nsi8122n1-etched.glb",
      "model_3d_step": "nsi8122n1-etched.step",
      "model_3d_step_plain": "nsi8122n1.step",
      "lbr": "nsi8122n1.lbr"
    },
    "distributor_links": {
      "lcsc": "C967849"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T22:22:55Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Power supply for isolator side 1, operating from 2.5 V to 5.5 V and bypassed to GND1 with a 0.1 µF capacitor placed as close to the package as possible."
      },
      {
        "number": "2",
        "name": "INA",
        "type": "input",
        "description": "Logic input A on side 1 with VIH minimum 2 V and VIL maximum 0.8 V, and a maximum input voltage of VDD+0.4 V (absolute maximum -0.4 V to VDD+0.4 V)."
      },
      {
        "number": "3",
        "name": "OUTB",
        "type": "output",
        "description": "Logic output B, which drives VOH of at least VDD-0.3 V at IOH ≤ 4 mA and VOL of at most 0.3 V at IOL ≤ 4 mA, with typical output impedance of about 50 Ω."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Ground 1, the ground reference for isolator side 1."
      },
      {
        "number": "5",
        "name": "GND2",
        "type": "power_in",
        "description": "Ground 2, the ground reference for isolator side 2."
      },
      {
        "number": "6",
        "name": "INB",
        "type": "input",
        "description": "Logic input B with VIH minimum 2 V and VIL maximum 0.8 V, and a maximum input voltage of VDD+0.4 V (absolute maximum -0.4 V to VDD+0.4 V)."
      },
      {
        "number": "7",
        "name": "OUTA",
        "type": "output",
        "description": "Logic output A, which drives VOH of at least VDD-0.3 V at IOH ≤ 4 mA and VOL of at most 0.3 V at IOL ≤ 4 mA, with typical output impedance of about 50 Ω."
      },
      {
        "number": "8",
        "name": "VDD2",
        "type": "power_in",
        "description": "Power supply for isolator side 2, operating from 2.5 V to 5.5 V and bypassed to GND2 with a 0.1 µF capacitor placed as close to the package as possible."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 1.1 is a text extraction with three pin-number columns (NSi8120N, NSi8121N, NSi8122N). The NSi; The datasheet does not state which isolator side OUTA and OUTB sit on in the NSi8122N, so the descri"
        ],
        "pages_sent": 21,
        "cost_usd": 0.0775,
        "at": "2026-10-18T22:19:07"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588905058348249088",
        "pages": 21,
        "sha256": "c564dd6713d734b2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "nsi8122n1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "nsi8122n1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b39a23579ac6dc4dc927c21d2dafcab51db45407a1324f5deabe337793bf9e6e",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}