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NSi8122N1

Public Made by Adom

by adom

NOVOSENSE Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NSi8122N1

NOVOSENSE · Digital Isolators · SOIC-8

NSi8122N1 from NOVOSENSE, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Power supply for isolator side 1, operating from 2.5 V to 5.5 V and bypassed to GND1 with a 0.1 µF capacitor placed as close to the package as possible.
2 INA input Logic input A on side 1 with VIH minimum 2 V and VIL maximum 0.8 V, and a maximum input voltage of VDD+0.4 V (absolute maximum -0.4 V to VDD+0.4 V).
3 OUTB output Logic output B, which drives VOH of at least VDD-0.3 V at IOH ≤ 4 mA and VOL of at most 0.3 V at IOL ≤ 4 mA, with typical output impedance of about 50 Ω.
4 GND1 power_in Ground 1, the ground reference for isolator side 1.
5 GND2 power_in Ground 2, the ground reference for isolator side 2.
6 INB input Logic input B with VIH minimum 2 V and VIL maximum 0.8 V, and a maximum input voltage of VDD+0.4 V (absolute maximum -0.4 V to VDD+0.4 V).
7 OUTA output Logic output A, which drives VOH of at least VDD-0.3 V at IOH ≤ 4 mA and VOL of at most 0.3 V at IOL ≤ 4 mA, with typical output impedance of about 50 Ω.
8 VDD2 power_in Power supply for isolator side 2, operating from 2.5 V to 5.5 V and bypassed to GND2 with a 0.1 µF capacitor placed as close to the package as possible.

Key specifications

Parameter Value
Manufacturer NOVOSENSE
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN VDE V 0884-11, each NSi8120N/NSi8121N/NSi8122N is proof tested by applying an insulation test voltage ≥ 847 V peak for 1 sec (partial discharge detection limit = 5 pC). The * ma 12

CAD (KiCad official)

  • Symbol: NSi8122N1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: nsi8122n1-etched.step / nsi8122n1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nsi8122n1.step / nsi8122n1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NOVOSENSE datasheet (21 pp, sha256 c564dd6713d734b2, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF