component
NSI1311-Q1SWVR
Public Made by Adomby adom
NOVOSENSE(纳芯微) Isolation Amplifiers, SOP-8-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NSI1311-Q1SWVR
NOVOSENSE(纳芯微) · Isolation Amplifiers · SOP-8-300mil
NSI1311-Q1SWVR from NOVOSENSE(纳芯微), in a SOP-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Power supply for isolator side 1, 3.0 V to 5.5 V; VDD1 undervoltage detection threshold is 1.8 V to 2.7 V (falling) and absolute maximum supply is 6.5 V. |
| 2 | VIN | power_in | Single-ended analog input with linear full-scale range 0.02 V to 2 V; if the input exceeds GND1 - 6 V to VDD1 + 0.5 V, the input current must be limited to 10 mA. |
| 3 | SHTDN | input | Active-high shutdown input, internally pulled up through a 100 kΩ (typical) resistor, with VIH of 0.7×VDD1 minimum and VIL of 0.3×VDD1 maximum, and it should be tied to GND1 for normal operation. |
| 4 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 5 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 6 | OUTN | output | Negative analog differential output with a fixed gain of 1, limited to GND2 - 0.5 V to VDD2 + 0.5 V and an output current of ±10 mA per pin. |
| 7 | OUTP | output | Positive analog differential output with a fixed gain of 1, limited to GND2 - 0.5 V to VDD2 + 0.5 V and an output current of ±10 mA per pin. |
| 8 | VDD2 | power_in | Power supply for isolator side 2, 3.0 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NOVOSENSE(纳芯微) |
| Package | SOP-8-300mil |
| Category | Signal Isolation Devices |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Side1 Power Supply | VDD1 | 3 | 5 | 5.5 | V | 4 | |
| Side2 Power Supply | VDD2 | 3 | 3.3 | 5.5 | V | 4 | |
| Linear differential input full scale voltage | VFSR | 0.02 | 2 | V | 4 | ||
| Operating Ambient Temperature | TA | -40 | 125 | ℃ | 4 | ||
| Differential input voltage before clipping output | VClipping | 2.56 | V | 4 | |||
| Power Supply Voltage | VDD1, VDD2 | -0.3 | 6.5 | V | 4 | ||
| Output current per Output Pin | Io | -10 | 10 | mA | 4 | ||
| Operating Temperature | TOPR | -40 | 125 | ℃ | 4 | ||
| Junction Temperature | TJ | -40 | 150 | ℃ | 4 | ||
| Storage Temperature | TSTG | -55 | 150 | ℃ | 4 | ||
| Electrostatic discharge HBM | HBM | -2000 | 2000 | V | Human body model, per AEC-Q100-002-RevD | 4 | |
| Electrostatic discharge CDM | CDM | -1000 | 1000 | V | Charged device model, per AEC-Q100-011-RevB | 4 | |
| Side1 Supply Voltage | VDD1 | 3 | 5 | 5.5 | V | 5 | |
| Side2 Supply Voltage | VDD2 | 3 | 3.3 | 5.5 | V | 5 | |
| Side1 Supply Current | IDD1 | 11.4 | 15.1 | mA | SHTDN = LOW | 5 | |
| Side1 Supply Current in shutdown | IDD1 | 1 | μA | SHTDN = HIGH | 5 | ||
| Side2 Supply Current | IDD2 | 6.3 | 8.4 | mA | 5 | ||
| VDD1 undervoltage detection threshold voltage | VDD1UV | 1.8 | 2.3 | 2.7 | V | VDD1 falling | 5 |
| Input offset voltage | VOS | -1.5 | 0.4 | 1.5 | mV | VIN = 1V | 5 |
| Input offset drift | TCVOS | -5 | 10 | 30 | μV/℃ | 5 | |
| Input bias current | IIB | -15 | 3.5 | 15 | nA | VIN = GND1 | 5 |
| Input bias current drift | TCIIB | -10 | 10 | pA/℃ | 5 | ||
| Gain error | EG | -0.3 | 0.05 | 0.3 | % | 5 | |
| Gain error thermal drift | TCEG | -45 | 5 | 45 | ppm/℃ | 5 | |
| Nonlinearity | -0.05 | 0.01 | 0.05 | % | 0.02V≤VIN≤0.1V | 5 | |
| Nonlinearity | -0.04 | 0.01 | 0.04 | % | 0.1V≤VIN≤2V | 5 | |
| Nonlinearity drift | -1 | 1 | ppm/℃ | 5 | |||
| Signal to noise ratio | SNR | 78 | 82 | dB | VIN = 1.8V, fIN = 1kHz, BW = 10kHz | 5 | |
| Common-mode output voltage | VCMout | 1.35 | 1.4 | 1.46 | V | 5 | |
| Input offset current/voltage analog input capacitance | CIN | 7 | pF | fIN = 275kHz | 5 | ||
| Failsafe differential output voltage | VFAILSAFE | -2.53 | -2.44 | V | SHTDN active, or VDD1 missing | 6 | |
| Common-mode transient immunity | CMTI | 100 | 150 | kV/μs | 6 | ||
| Digital input current | IIN | -70 | 1 | µA | GND1 ≤ VSHTDN ≤ VDD1 | 6 | |
| Low-level input voltage | VIL | -0.3 | V | 6 | |||
| Rising time of OUTP, OUTN | tr | 1.3 | μs | 6 | |||
| Falling time of OUTP, OUTN | tf | 1.3 | μs | 6 | |||
| INP, INN to OUTP, OUTN signal delay (50% - 50%) | tPD | 1.6 | 2.1 | μs | 6 | ||
| Analog setting time | tAS | 0.5 | ms | VDD1 step to 3.0 V with VDD2 ≥ 3.0 V, to OUTP, OUTN valid, 0.1% settling | 6 | ||
| Device enable time | tEN | 80 | 100 | μs | SHTDN high to low | 6 | |
| Shutdown time | tSHTDN | 1.2 | 5 | μs | SHTDN low to high | 6 | |
| Power supply rejection ratio DC vs VDD1 | PSRRdc | -78 | dB | PSRR vs VDD1, at DC | 6 | ||
| Power supply rejection ratio AC vs VDD1 | PSRRac | -75 | dB | PSRR vs VDD1, 100mV and 10kHz ripple | 6 | ||
| Power supply rejection ratio DC vs VDD2 | PSRRdc | -82 | dB | PSRR vs VDD2, at DC | 6 | ||
| Power supply rejection ratio AC vs VDD2 | PSRRac | -74 | dB | PSRR vs VDD2, 100mV and 10kHz ripple | 6 | ||
| Output resistance | ROUT | 0.2 | Ω | 6 | |||
| Total harmonic distortion | THD | -87 | dB | VIN = 1.8V, fIN = 10kHz, BW = 100kHz | 5 | ||
| Output noise | 210 | µVRMS | VIN = 1V, BW = 100kHz | 5 | |||
| Signal to noise ratio | SNR | 70 | dB | VIN = 1.8V, fIN = 10kHz, BW = 100kHz | 5 | ||
| Input resistance | RIN | 1 | GΩ | 5 | |||
| Input capacitance (digital SHTDN) | CIN | 5 | pF | 6 | |||
| Output bandwidth | BW | 400 | kHz | 6 | |||
| Junction-to-ambient thermal resistance | RθJA | 86 | ℃/W | 4 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 28 | ℃/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 42 | ℃/W | 4 | |||
| Junction-to-top characterization parameter | ΨJT | 4 | ℃/W | 4 | |||
| Junction-to-board characterization parameter | ΨJB | 42 | ℃/W | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs | 1.1 Add SOW8 board layout example and update insulation characteristics 2021/7/17 1.2 Add Tj in absolute maximum ratings and update DTI in 6.1 2022/4/13 | 16 |
CAD (KiCad official)
- Symbol:
NSI1311-Q1SWVR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8-300mil (KiCad packages3D, STEP)
- 3D model files:
nsi1311-q1swvr-etched.step/nsi1311-q1swvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nsi1311-q1swvr.step/nsi1311-q1swvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NOVOSENSE(纳芯微) datasheet (17 pp, sha256
8bbffec1945bcdf7, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NSI1311-Q1SWVR
**NOVOSENSE(纳芯微)** · Isolation Amplifiers · SOP-8-300mil
NSI1311-Q1SWVR from NOVOSENSE(纳芯微), in a SOP-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Power supply for isolator side 1, 3.0 V to 5.5 V; VDD1 undervoltage detection threshold is 1.8 V to 2.7 V (falling) and absolute maximum supply is 6.5 V. |
| 2 | VIN | power_in | Single-ended analog input with linear full-scale range 0.02 V to 2 V; if the input exceeds GND1 - 6 V to VDD1 + 0.5 V, the input current must be limited to 10 mA. |
| 3 | SHTDN | input | Active-high shutdown input, internally pulled up through a 100 kΩ (typical) resistor, with VIH of 0.7×VDD1 minimum and VIL of 0.3×VDD1 maximum, and it should be tied to GND1 for normal operation. |
| 4 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 5 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 6 | OUTN | output | Negative analog differential output with a fixed gain of 1, limited to GND2 - 0.5 V to VDD2 + 0.5 V and an output current of ±10 mA per pin. |
| 7 | OUTP | output | Positive analog differential output with a fixed gain of 1, limited to GND2 - 0.5 V to VDD2 + 0.5 V and an output current of ±10 mA per pin. |
| 8 | VDD2 | power_in | Power supply for isolator side 2, 3.0 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NOVOSENSE(纳芯微) |
| Package | SOP-8-300mil |
| Category | Signal Isolation Devices |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Side1 Power Supply | VDD1 | 3 | 5 | 5.5 | V | | 4 |
| Side2 Power Supply | VDD2 | 3 | 3.3 | 5.5 | V | | 4 |
| Linear differential input full scale voltage | VFSR | 0.02 | | 2 | V | | 4 |
| Operating Ambient Temperature | TA | -40 | | 125 | ℃ | | 4 |
| Differential input voltage before clipping output | VClipping | | 2.56 | | V | | 4 |
| Power Supply Voltage | VDD1, VDD2 | -0.3 | | 6.5 | V | | 4 |
| Output current per Output Pin | Io | -10 | | 10 | mA | | 4 |
| Operating Temperature | TOPR | -40 | | 125 | ℃ | | 4 |
| Junction Temperature | TJ | -40 | | 150 | ℃ | | 4 |
| Storage Temperature | TSTG | -55 | | 150 | ℃ | | 4 |
| Electrostatic discharge HBM | HBM | -2000 | | 2000 | V | Human body model, per AEC-Q100-002-RevD | 4 |
| Electrostatic discharge CDM | CDM | -1000 | | 1000 | V | Charged device model, per AEC-Q100-011-RevB | 4 |
| Side1 Supply Voltage | VDD1 | 3 | 5 | 5.5 | V | | 5 |
| Side2 Supply Voltage | VDD2 | 3 | 3.3 | 5.5 | V | | 5 |
| Side1 Supply Current | IDD1 | | 11.4 | 15.1 | mA | SHTDN = LOW | 5 |
| Side1 Supply Current in shutdown | IDD1 | | 1 | | μA | SHTDN = HIGH | 5 |
| Side2 Supply Current | IDD2 | | 6.3 | 8.4 | mA | | 5 |
| VDD1 undervoltage detection threshold voltage | VDD1UV | 1.8 | 2.3 | 2.7 | V | VDD1 falling | 5 |
| Input offset voltage | VOS | -1.5 | 0.4 | 1.5 | mV | VIN = 1V | 5 |
| Input offset drift | TCVOS | -5 | 10 | 30 | μV/℃ | | 5 |
| Input bias current | IIB | -15 | 3.5 | 15 | nA | VIN = GND1 | 5 |
| Input bias current drift | TCIIB | -10 | | 10 | pA/℃ | | 5 |
| Gain error | EG | -0.3 | 0.05 | 0.3 | % | | 5 |
| Gain error thermal drift | TCEG | -45 | 5 | 45 | ppm/℃ | | 5 |
| Nonlinearity | | -0.05 | 0.01 | 0.05 | % | 0.02V≤VIN≤0.1V | 5 |
| Nonlinearity | | -0.04 | 0.01 | 0.04 | % | 0.1V≤VIN≤2V | 5 |
| Nonlinearity drift | | -1 | | 1 | ppm/℃ | | 5 |
| Signal to noise ratio | SNR | 78 | 82 | | dB | VIN = 1.8V, fIN = 1kHz, BW = 10kHz | 5 |
| Common-mode output voltage | VCMout | 1.35 | 1.4 | 1.46 | V | | 5 |
| Input offset current/voltage analog input capacitance | CIN | | 7 | | pF | fIN = 275kHz | 5 |
| Failsafe differential output voltage | VFAILSAFE | -2.53 | | -2.44 | V | SHTDN active, or VDD1 missing | 6 |
| Common-mode transient immunity | CMTI | 100 | 150 | | kV/μs | | 6 |
| Digital input current | IIN | -70 | | 1 | µA | GND1 ≤ VSHTDN ≤ VDD1 | 6 |
| Low-level input voltage | VIL | -0.3 | | | V | | 6 |
| Rising time of OUTP, OUTN | tr | | 1.3 | | μs | | 6 |
| Falling time of OUTP, OUTN | tf | | 1.3 | | μs | | 6 |
| INP, INN to OUTP, OUTN signal delay (50% - 50%) | tPD | | 1.6 | 2.1 | μs | | 6 |
| Analog setting time | tAS | | 0.5 | | ms | VDD1 step to 3.0 V with VDD2 ≥ 3.0 V, to OUTP, OUTN valid, 0.1% settling | 6 |
| Device enable time | tEN | | 80 | 100 | μs | SHTDN high to low | 6 |
| Shutdown time | tSHTDN | | 1.2 | 5 | μs | SHTDN low to high | 6 |
| Power supply rejection ratio DC vs VDD1 | PSRRdc | | -78 | | dB | PSRR vs VDD1, at DC | 6 |
| Power supply rejection ratio AC vs VDD1 | PSRRac | | -75 | | dB | PSRR vs VDD1, 100mV and 10kHz ripple | 6 |
| Power supply rejection ratio DC vs VDD2 | PSRRdc | | -82 | | dB | PSRR vs VDD2, at DC | 6 |
| Power supply rejection ratio AC vs VDD2 | PSRRac | | -74 | | dB | PSRR vs VDD2, 100mV and 10kHz ripple | 6 |
| Output resistance | ROUT | | | 0.2 | Ω | | 6 |
| Total harmonic distortion | THD | | -87 | | dB | VIN = 1.8V, fIN = 10kHz, BW = 100kHz | 5 |
| Output noise | | | 210 | | µVRMS | VIN = 1V, BW = 100kHz | 5 |
| Signal to noise ratio | SNR | | 70 | | dB | VIN = 1.8V, fIN = 10kHz, BW = 100kHz | 5 |
| Input resistance | RIN | | 1 | | GΩ | | 5 |
| Input capacitance (digital SHTDN) | CIN | | 5 | | pF | | 6 |
| Output bandwidth | BW | | 400 | | kHz | | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 86 | | ℃/W | | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 28 | | ℃/W | | 4 |
| Junction-to-board thermal resistance | RθJB | | 42 | | ℃/W | | 4 |
| Junction-to-top characterization parameter | ΨJT | | 4 | | ℃/W | | 4 |
| Junction-to-board characterization parameter | ΨJB | | 42 | | ℃/W | | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs | | 1.1 Add SOW8 board layout example and update insulation characteristics 2021/7/17 1.2 Add Tj in absolute maximum ratings and update DTI in 6.1 2022/4/13 | 16 |
## CAD (KiCad official)
- Symbol: `NSI1311-Q1SWVR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8-300mil (KiCad packages3D, STEP)
- 3D model files: `nsi1311-q1swvr-etched.step` / `nsi1311-q1swvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nsi1311-q1swvr.step` / `nsi1311-q1swvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [NOVOSENSE(纳芯微) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589785083604467712) (17 pp, sha256 `8bbffec1945bcdf7`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/nsi1311-q1swvr-datasheet.pdf)