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NSG0462UQ

WXNSIC(国硅集成) · Gate Drivers · QFN-16-EP(3x3)

NSG0462UQ from WXNSIC(国硅集成), in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN1 input Phase 1 high-side logic input with ON threshold min 2.9 V, OFF threshold max 0.4 V, and absolute range -0.3 V to 26 V.
2 LIN3 input Phase 3 low-side logic input with ON threshold min 2.9 V, OFF threshold max 0.4 V, and absolute range -0.3 V to 26 V.
3 LIN2 input Phase 2 low-side logic input with ON threshold min 2.9 V, OFF threshold max 0.4 V, and absolute range -0.3 V to 26 V.
4 LIN1 input Phase 1 low-side logic input with ON threshold min 2.9 V, OFF threshold max 0.4 V, and absolute range -0.3 V to 26 V.
5 LDO5 power_out 5 V LDO output for powering an MCU or other devices, 4.7 V to 5.3 V, up to 40 mA (VCC 10 V to 28 V) or 50 mA (VCC 11 V to 28 V), absolute max 6 V.
6 VCC1 power_in Supply voltage pin 1 for the driver, recommended 5 V to 28 V, absolute max 40 V, referenced to GND.
7 VCC2 power_in Supply voltage pin 2 for the driver, recommended 5 V to 28 V, absolute max 40 V, referenced to GND.
8 HO1 output Phase 1 high-side gate drive output, with VHO between VCC-15 V and VCC, and short-circuit pulse currents of 50 mA source and 300 mA sink.
9 LO1 output Phase 1 low-side gate drive output, with high level 8.5 V to 11.5 V (10 V typ), absolute max 15 V, and short-circuit pulse currents of 50 mA source and 300 mA sink.
10 HO2 output Phase 2 high-side gate drive output, with VHO between VCC-15 V and VCC, and short-circuit pulse currents of 50 mA source and 300 mA sink.
11 LO2 output Phase 2 low-side gate drive output, with high level 8.5 V to 11.5 V (10 V typ), absolute max 15 V, and short-circuit pulse currents of 50 mA source and 300 mA sink.
12 HO3 output Phase 3 high-side gate drive output, with VHO between VCC-15 V and VCC, and short-circuit pulse currents of 50 mA source and 300 mA sink.
13 LO3 output Phase 3 low-side gate drive output, with high level 8.5 V to 11.5 V (10 V typ), absolute max 15 V, and short-circuit pulse currents of 50 mA source and 300 mA sink.
14 GND power_in Chip ground reference; all voltage parameters in the datasheet are referenced to this pin.
15 HIN3 input Phase 3 high-side logic input with ON threshold min 2.9 V, OFF threshold max 0.4 V, and absolute range -0.3 V to 26 V.
16 HIN2 input Phase 2 high-side logic input with ON threshold min 2.9 V, OFF threshold max 0.4 V, and absolute range -0.3 V to 26 V.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer WXNSIC(国硅集成)
Package QFN-16-EP(3x3)
Category Motor Driver ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 (VCC, referenced to GND) VCC -0.3 40 V 5
LDO 输出电压 (VDD) VDD -0.3 6 V 5
LDO 输出电流 (IVDD) IVDD -0.3 50 mA 5
逻辑输入 HIN1,2,3 & LIN1,2,3 电压 VIN -0.3 26 V 5
低侧输出电压 LO1,2,3 VLO -0.3 15 V 5
ESD 人体放电模式 ESD 2 kV 5
ESD 机器放电模式 ESD 500 V 5
封装功率 PD PD 1.4 W TA ≤25°C 5
结-环境热阻 RthJA 200 °C/W 5
结-外壳热阻 RthJC 40 °C/W 5
结温 TJ TJ 150 °C 5
存储温度 TS TS -55 150 °C 5
低侧电源电压 VCC 5 28 V 5
LDO 输出电流 IVDD 0 40 mA VCC=10V~28V 5
LDO 输出电流 IVDD 0 50 mA VCC=11V~28V 5
HIN1,2,3和LIN1,2,3 逻辑输入 ON 阈值电压 VIN,ON 2.9 20 V 5
HIN1,2,3和LIN1,2,3 逻辑输入 OFF 阈值电压 VIN,OFF 0 0.4 V 5
输入 HIN1,2,3 和 LIN1,2,3 之间的死区时间 tDT 0.5 us 5
输入信号频率 fIN 0 50 kHz 5
环境温度 TA -40 125 °C 5
高电平输入阈值电压 VIH 2.5 V 6
低电平输入阈值电压 VIL 0.8 V 6
逻辑“1”输入偏置电流 IIN+ 36 100 uA 6
逻辑“0”输入偏置电流 IIN- 0 1 uA 6
LO 高电平输出电压 VLO,OH 8.5 10 11.5 V 6
VCC 欠压正向阈值 VCCUV+ 3.8 4.5 5 V 6
VCC 欠压负向阈值 VCCUV- 3.6 4.3 4.8 V 6
VCC 欠压迟滞 VCCHYS 0.1 0.2 0.4 V 6
VCC 静态电流 IQCC 0.3 0.5 1 mA 6
VDD 输出电压 VDD 4.7 5 5.3 V 6

CAD (KiCad official)

  • Symbol: NSG0462UQ
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: nsg0462uq-etched.step / nsg0462uq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nsg0462uq.step / nsg0462uq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WXNSIC(国硅集成) datasheet (9 pp, sha256 525eb908bd516dc1, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF