NLV74HC138ADR2G

{
  "slug": "nlv74hc138adr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "nlv74hc138adr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "nlv74hc138adr2g.kicad_sym",
    "nlv74hc138adr2g.kicad_mod",
    "nlv74hc138adr2g.glb",
    "nlv74hc138adr2g.step",
    "nlv74hc138adr2g.lbr",
    "docs/hero.png",
    "docs/nlv74hc138adr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "nlv74hc138adr2g-hero.glb",
    "nlv74hc138adr2g-hero.overlay.json",
    "nlv74hc138adr2g-etched.glb"
  ],
  "component": {
    "mpn": "NLV74HC138ADR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Signal Switches, Multiplexers, Decoders",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929479804112896",
    "parts": {
      "symbol": "nlv74hc138adr2g.kicad_sym",
      "footprint": "nlv74hc138adr2g.kicad_mod",
      "model_3d": "nlv74hc138adr2g-hero.glb",
      "model_3d_plain": "nlv74hc138adr2g-etched.glb",
      "model_3d_step": "nlv74hc138adr2g-etched.step",
      "model_3d_step_plain": "nlv74hc138adr2g.step",
      "lbr": "nlv74hc138adr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C904844"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T17:22:26Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "A0",
        "type": "input",
        "description": "Address input; when the chip is selected, the A0-A2 combination determines which one of the eight active-low outputs is asserted, and unused inputs must be tied to GND or VCC."
      },
      {
        "number": "2",
        "name": "A1",
        "type": "input",
        "description": "Address input; when the chip is selected, the A0-A2 combination determines which one of the eight active-low outputs is asserted, and unused inputs must be tied to GND or VCC."
      },
      {
        "number": "3",
        "name": "A2",
        "type": "input",
        "description": "Address input; when the chip is selected, the A0-A2 combination determines which one of the eight active-low outputs is asserted, and unused inputs must be tied to GND or VCC."
      },
      {
        "number": "4",
        "name": "CS2",
        "type": "input",
        "description": "Active-low chip select; the chip is selected only when CS2 and CS3 are low and CS1 is high, otherwise all outputs are held high."
      },
      {
        "number": "5",
        "name": "CS3",
        "type": "input",
        "description": "Active-low chip select; the chip is selected only when CS2 and CS3 are low and CS1 is high, otherwise all outputs are held high."
      },
      {
        "number": "6",
        "name": "CS1",
        "type": "input",
        "description": "Active-high chip select; the chip is selected only when CS1 is high and CS2 and CS3 are low, otherwise all outputs are held high."
      },
      {
        "number": "7",
        "name": "Y7",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all voltages; input and output voltages are specified relative to GND."
      },
      {
        "number": "9",
        "name": "Y6",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "10",
        "name": "Y5",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "11",
        "name": "Y4",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "12",
        "name": "Y3",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "13",
        "name": "Y2",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "14",
        "name": "Y1",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "15",
        "name": "Y0",
        "type": "output",
        "description": "Active-low decoded output that goes low when addressed with the chip selected and stays high otherwise."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; recommended operating range is 2.0 V to 6.0 V referenced to GND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers for A0-A2, CS1-CS3 and Y0-Y7 come from the PIN DESCRIPTIONS text on page 5, which matche; GND and VCC pin numbers are stated explicitly on page 2 (PIN 16 = VCC, PIN 8 = GND). The per-pin des"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0605,
        "at": "2026-10-18T17:21:49"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929479804112896",
        "pages": 10,
        "sha256": "3fb79c20ec75b50f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "nlv74hc138adr2g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
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        "file": "nlv74hc138adr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4503e9a038f4392223d5f7d249f4840711b9af0402a861f166f1f3921e06da13",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}