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NIS5132MN1TXG

onsemi · Resettable Fuses · DFN-10(3x3)

NIS5132MN1TXG from onsemi, in a DFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Negative input voltage to the device, used as the internal reference for the IC.
2 dv/dt input The internal dv/dt circuit controls the output slew rate at turn on, ramping over approximately 2 ms, and an external capacitor on this pin can increase the ramp time; leave it open if no extra delay is needed.
3 Enable/Fault bidirectional Tri-state bidirectional pin that disables the output when pulled to ground through an open-drain or open-collector device, and goes to an intermediate state to signal a thermal shutdown.
4 ILIMIT passive A resistor between this pin and the source pin sets the overload and short-circuit current limit levels.
5 NC unconnected Not connected.
6 SOURCE power_out Source of the internal power FET and the output terminal of the fuse.
7 SOURCE power_out Source of the internal power FET and the output terminal of the fuse.
8 SOURCE power_out Source of the internal power FET and the output terminal of the fuse.
9 SOURCE power_out Source of the internal power FET and the output terminal of the fuse.
10 SOURCE power_out Source of the internal power FET and the output terminal of the fuse.
11 VCC power_in Positive input voltage to the device; this is the belly pad (flag).

Key specifications

Parameter Value
Manufacturer onsemi
Package DFN-10(3x3)
Category TVS/Fuse/Board Level Protection
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage, operating, steady-state VIN -0.6 18 V VCC to GND, Note 1 2
Input Voltage Transient VIN -0.6 25 V Transient (100 ms) 2
Operating Temperature Range TJ -40 150 °C Note 3 2
Nonoperating Temperature Range TJ -55 155 °C 2
Lead Temperature, Soldering TL 260 °C 10 Sec 2
Total Power Dissipation Pmax 1.3 W TA = 25°C 2
Derate above 25°C 10.4 mW/°C Derate above 25°C 2
Thermal Resistance, Junction-to-Air JA 227 °C/W 0.1 in2 copper (Note 2) 2
Thermal Resistance, Junction-to-Air JA 95 °C/W 0.5 in2 copper (Note 2) 2
Thermal Resistance, Junction-to-Lead (Pin 1) JL 27 °C/W Pin 1 2
Thermal Resistance, Junction-to-Case JC 20 °C/W 2
ESD Human Body Model (HBM) 2000 V Human Body Model (HBM) 1
ESD Machine Model (MM) 200 V Machine Model (MM) 1
Input Voltage Range VCC 9 18 V Input range (Features) 1
Kelvin ON Resistance RDSon 35 44 55 m Note 4 3
Kelvin ON Resistance RDSon 62 m TJ = 140°C (Note 5) 3
Delay Time (enabling of chip) Tdly 220 µs ID = 100 mA with 1 A resistive load 3
Off State Output Voltage Voff 190 300 mV VCC = 18 Vdc, VGS = 0 Vdc 3
Output Capacitance 250 pF VDS = 12 Vdc, VGS = 0 Vdc, f = 1 MHz 3
Continuous Current ID 3.6 A TA = 25°C, 0.5 in2 pad (Note 5) 3
Continuous Current ID 1.7 A TA = 80°C, minimum copper 3
Shutdown Temperature TSD 150 175 200 °C Note 5 3
Output Clamping Voltage (Overvoltage Protection) VClamp 14 15 16.2 V VCC = 18 V (Note 6) 3
Undervoltage Lockout (Turn on, voltage going high) VUVLO 7.7 8.5 9.3 V Turn on, voltage going high 3
UVLO Hysteresis VHyst 0.8 V 3
Kelvin Short Circuit Current Limit ILim-SS 2.75 3.44 4.25 A RLimit = 15.4, Note 7 3
Kelvin Overload Current Limit ILim-OL 4.6 A RLimit = 15.4, Note 7 3
Output Voltage Ramp Time tslew 0.5 0.9 1.8 ms Enable to VOUT = 11.7 V 3
Logic Level Low (Output Disabled) Vin-low 0.35 0.58 0.81 V 3
Logic Level Mid (Thermal Fault, Output Disabled) Vin-mid 0.82 1.4 1.95 V Thermal Fault, Output Disabled 3
Logic Level High (Output Enabled) Vin-high 1.96 2.64 3.3 V Output Enabled 3
High State Maximum Voltage Vin-max 3.4 4.3 5.2 V 3
Logic Low Sink Current Iin-low -25 -17 µA Venable = 0 V 3
Logic High Leakage Current for External Switch Iin-leak 1 µA Venable = 3.3 V 3
Maximum Fanout for Fault Signal Fan 3 Units Total number of chips that can be connected to this pin for simultaneous shutdown 3
Bias Current (Operational) IBias 1.8 2.5 mA Operational 3
Bias Current (Shutdown) IBias 1 mA Shutdown 3
Minimum Operating Voltage Vmin 7.6 V Notes 5 and 8 3

CAD (KiCad official)

  • Symbol: NIS5132MN1TXG
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: DFN-10(3x3) (KiCad packages3D, STEP)
  • 3D model files: nis5132mn1txg-etched.step / nis5132mn1txg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nis5132mn1txg.step / nis5132mn1txg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 1131a7f3ab924db6, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF