NCV5700DR2G

{
  "slug": "ncv5700dr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Gate Drive ICs, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management ics",
    "ncv5700dr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncv5700dr2g.kicad_sym",
    "ncv5700dr2g.kicad_mod",
    "ncv5700dr2g.glb",
    "ncv5700dr2g.step",
    "ncv5700dr2g.lbr",
    "docs/hero.png",
    "docs/ncv5700dr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ncv5700dr2g-hero.glb",
    "ncv5700dr2g-hero.overlay.json",
    "ncv5700dr2g-etched.glb"
  ],
  "component": {
    "mpn": "NCV5700DR2G",
    "manufacturer": "onsemi",
    "package": "SO-16",
    "pin_count": 16,
    "category": "Power Management ICs",
    "subcategory": "Gate Drive ICs",
    "datasheet": "https://www.onsemi.com/pdf/datasheet/ncv5700-d.pdf",
    "parts": {
      "symbol": "ncv5700dr2g.kicad_sym",
      "footprint": "ncv5700dr2g.kicad_mod",
      "model_3d": "ncv5700dr2g-hero.glb",
      "model_3d_plain": "ncv5700dr2g-etched.glb",
      "model_3d_step": "ncv5700dr2g-etched.step",
      "model_3d_step_plain": "ncv5700dr2g.step",
      "lbr": "ncv5700dr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C603966",
      "digikey": "NCV5700DR2GOSTR-ND",
      "mouser": "863-NCV5700DR2G"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T20:55:38Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "NCV5700DR2GOSTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "863-NCV5700DR2G",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "EN",
        "type": "input",
        "description": "Enable input allows additional gating of VOH and VOL and can turn the driver output off independently of the microcontroller input; the absolute maximum VEN−GND range is −0.3 V to 5.5 V."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "power_in",
        "description": "Input signal controlling the output with signal inversion from VIN to VOH/VOL; VIN is internally clamped to 5.5 V, has a 1 MΩ pull-up to keep the output low without an input, and requires a minimum pulse width before VOH/VOL activate."
      },
      {
        "number": "3",
        "name": "VREF",
        "type": "power_in",
        "description": "5 V reference generated within the driver, brought out for external bypassing and for powering low-bias circuits such as digital isolators; the recommended capacitance is 100 nF and the reference output current is specified at 20 mA maximum."
      },
      {
        "number": "4",
        "name": "FLT",
        "type": "output",
        "description": "Active-low fault output that tells the controller the driver has detected a fault and deactivated the output; absolute maximum FLT sink current is 20 mA and source current is 25 mA."
      },
      {
        "number": "5",
        "name": "GNDA",
        "type": "power_in",
        "description": "Convenient connection point for bypass capacitors (e.g. REF) on the left side of the package."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "Pin not internally connected."
      },
      {
        "number": "7",
        "name": "RSVD",
        "type": "unconnected",
        "description": "Reserved pin; no connection is allowed."
      },
      {
        "number": "8",
        "name": "NC",
        "type": "unconnected",
        "description": "Pin not internally connected."
      },
      {
        "number": "9",
        "name": "DESAT",
        "type": "input",
        "description": "Input for detecting IGBT desaturation; a capacitor on this pin sets a programmable blanking delay every ON cycle before a DESAT fault is processed, and the absolute maximum DESAT voltage is −0.3 V to VCC + 0.3 V."
      },
      {
        "number": "10",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive bias supply for the driver with an operating range from UVLO to the maximum, requiring a good quality bypass capacitor to GND placed close to the pins; the absolute maximum VCC−GND is 22 V."
      },
      {
        "number": "11",
        "name": "VOH",
        "type": "output",
        "description": "Driver high output providing the drive voltage and source current to the IGBT gate; the absolute maximum VOH−GND is VCC + 0.3 V."
      },
      {
        "number": "12",
        "name": "VOL",
        "type": "output",
        "description": "Driver low output providing the drive voltage and sink current to the IGBT gate, actively pulled low during start-up and fault conditions."
      },
      {
        "number": "13",
        "name": "GND",
        "type": "power_in",
        "description": "Connect to the IGBT emitter with a short trace; all power-pin bypass capacitors should be referenced to this pin and kept a short distance from it."
      },
      {
        "number": "14",
        "name": "VEE",
        "type": "power_in",
        "description": "Negative bias pin allowing VOL to go to a negative voltage during the OFF state (negative supply range −15 V to 0 V); a good quality bypass capacitor to GND is required, and if no negative voltage is used this pin must be connected to GND."
      },
      {
        "number": "15",
        "name": "VEEA",
        "type": "power_in",
        "description": "Analog version of the VEE pin for signal trace connections, internally connected to VEE."
      },
      {
        "number": "16",
        "name": "CLAMP",
        "type": "bidirectional",
        "description": "Active Miller clamp pin that clamps the IGBT gate during the off period to protect it from parasitic turn-on; it must be tied directly to the IGBT gate with minimum trace length."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 1 lists GNDA as type 'x' (unspecified). Mapped to power_in because it is a ground-named bypass; Table 1 lists NC and RSVD pins as type 'x'. Mapped to unconnected per the 'not internally connected'; The Pin Connections diagram text on page 1 is garbled and its numbering could not be reliably read. "
        ],
        "pages_sent": 19,
        "cost_usd": 0.0937,
        "at": "2026-10-28T20:55:12"
      },
      "datasheet": {
        "url": "https://www.onsemi.com/pdf/datasheet/ncv5700-d.pdf",
        "pages": 19,
        "sha256": "945a07307c48a515",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncv5700dr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "sha256": "74cb1fb11f15c7e1a8e6e93438621d3542cd9a2578bc170cc74abcc126e27042",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "SOIC-16 (CASE 751B-05)",
      "source_page": 18,
      "D": {
        "nom_mm": 9.9,
        "range_mm": [
          9.8,
          10.0
        ]
      },
      "E1": {
        "nom_mm": 3.9,
        "range_mm": [
          3.8,
          4.0
        ]
      },
      "E": {
        "nom_mm": 6.0,
        "range_mm": [
          5.8,
          6.2
        ]
      },
      "e": {
        "nom_mm": 1.27,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.55,
        "range_mm": [
          1.35,
          1.75
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ncv5700dr2g.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}