NCV4275CDS50R4G

{
  "slug": "ncv4275cds50r4g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-263-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ncv4275cds50r4g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncv4275cds50r4g.kicad_sym",
    "ncv4275cds50r4g.kicad_mod",
    "ncv4275cds50r4g.glb",
    "ncv4275cds50r4g.step",
    "ncv4275cds50r4g.lbr",
    "docs/hero.png",
    "docs/ncv4275cds50r4g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ncv4275cds50r4g-hero.glb",
    "ncv4275cds50r4g-hero.overlay.json",
    "ncv4275cds50r4g-etched.glb"
  ],
  "component": {
    "mpn": "NCV4275CDS50R4G",
    "manufacturer": "onsemi",
    "package": "TO-263-5",
    "pin_count": 6,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589837927011553280",
    "parts": {
      "symbol": "ncv4275cds50r4g.kicad_sym",
      "footprint": "ncv4275cds50r4g.kicad_mod",
      "model_3d": "ncv4275cds50r4g-hero.glb",
      "model_3d_plain": "ncv4275cds50r4g-etched.glb",
      "model_3d_step": "ncv4275cds50r4g-etched.step",
      "model_3d_step_plain": "ncv4275cds50r4g.step",
      "lbr": "ncv4275cds50r4g.lbr"
    },
    "distributor_links": {
      "lcsc": "C603932",
      "digikey": "NCV4275CDS50R4GOSTR-ND",
      "mouser": "863-NCV4275CDS50R4G"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T07:08:00Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "NCV4275CDS50R4GOSTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "863-NCV4275CDS50R4G",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "I",
        "type": "power_in",
        "description": "Input; battery supply input voltage (operating 5.5 V to 42 V for the 5.0 V version, absolute max -42 V to 45 V), bypass to ground with a ceramic capacitor."
      },
      {
        "number": "2",
        "name": "RO",
        "type": "output",
        "description": "Reset Output; open collector active reset, accurate when I > 1.0 V, needs external pull-up (typically 5.0 k to VQ), max 25 V and ±5.0 mA."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground; pin 3 is internally connected to the tab."
      },
      {
        "number": "4",
        "name": "D",
        "type": "passive",
        "description": "Reset Delay; timing capacitor to GND sets the reset delay time (47 nF gives 16 ms typical)."
      },
      {
        "number": "5",
        "name": "Q",
        "type": "power_out",
        "description": "Output; ±2.0% 5.0 V, 450 mA output, bypass with 22 µF capacitor with ESR < 4.5 Ω (5.0 V version)."
      },
      {
        "number": "6",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet lists pin 3 as 'GND' and the tab as 'TAB' in the same row (pin 3, TAB GND), with the t; The source text drops the micro sign in the capacitor value ('22 F'); it is written here as 22 µF ba; The pin table is shared by the DPAK-5 (DT) and D2PAK-5 (DS) variants. The D2PAK-5 mapping was applie"
        ],
        "pages_sent": 16,
        "cost_usd": 0.066,
        "at": "2026-10-18T07:04:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589837927011553280",
        "pages": 16,
        "sha256": "572ffc2d9f1cc2f6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ncv4275cds50r4g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          15.0,
          10.0,
          4.42
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "94c2a3dc1aaad85b6b5193f97d9a7c61b4e28bac25952a1e629557bcf747e246",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncv4275cds50r4g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          15.0,
          10.0,
          4.42
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2a44cba4fffc7ee8a77413fd2db8ef83f0c873085319900a5a70817276d210f4",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}