component

NCP6324BMTAATBG

Public Made by Adom

by adom

onsemi DC-DC Converters, WDFN-8(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ncp6324bmtaatbgfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
ncp6324bmtaatbg / README.md
History Download
Ray Publish 0.1.0 1bcb50a 13d ago

NCP6324BMTAATBG

onsemi · DC-DC Converters · WDFN-8(2x2)

NCP6324BMTAATBG from onsemi, in a WDFN-8(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGND power_in Power ground for the power and analog blocks; must be connected to the system ground.
2 SW power_out Switch power pin that connects the power transistors to one end of the inductor.
3 AGND power_in Analog ground for the analog and digital blocks; must be connected to the system ground.
4 FB input Feedback input from the buck converter output to the error amplifier, connected to the resistor divider between the output and AGND.
5 EN input Enable input: a high level (above 1.1 V min) enables the device and a low level (below 0.4 V max) disables it.
6 PG/MODE output On the NCP6324B this is an open-drain Power Good output that is low when the output is not in power good and high-impedance when it is; it may be left unconnected when unused.
7 AVIN power_in Analog and digital supply input for the device (2.5 V to 5.5 V); an optional 1 µF or larger ceramic capacitor should be placed as close as possible to this pin.
8 PVIN power_in Power supply input for the device (2.5 V to 5.5 V); a 10 µF or larger ceramic capacitor must bypass this pin to ground, placed as close as possible.
9 PAD passive Exposed pad that must be soldered to system ground to achieve the specified power dissipation; the datasheet states it is internally unconnected.

Key specifications

Parameter Value
Manufacturer onsemi
Package WDFN-8(2x2)
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog Pins DC non switching (AVIN, PG, FB, EN) VA-DC -0.3 6 V DC non switching: AVIN, PG, FB, EN 4
Power Pins DC non switching (PVIN, SW) VP-DC -0.3 6 V DC non switching: PVIN, SW 4
Between PVIN, PGND pins transient VP-TR -0.3 7.5 V transient 3 ns - 3 MHz 4
Human Body Model (HBM) ESD Rating ESD HBM 2000 V Note 1 4
Machine Model (MM) ESD Rating ESD MM 200 V Note 1 4
Latchup Current ILU -100 100 mA Note 2 4
Junction Temperature Range TJMAX -40 °C Note 3 4
Storage Temperature Range TSTG -55 150 °C 4
Thermal Resistance Junction-to-Top Case RJC 12 °C/W Note 4 4
Thermal Resistance Junction-to-Board RJB 30 °C/W Note 4 4
Thermal Resistance Junction-to-Ambient RJA 62 °C/W Note 4 4
Power Dissipation PD 1.6 W Note 5 4
Analog Input Supply AVINR 2.5 5.5 V 4
Power Input Supply PVINR 2.5 5.5 V 4
Operating Junction Temperature Range TJ -40 125 °C Note 7 4
Inductor for DC to DC Converter LOUT 0.67 1 µH Note 8 4
Output Capacitor COUT 7 10 µF Notes 8, 9 4
Input Capacitor for Power Supply CPVIN 7 10 µF Note 8 4
VIN Input Voltage Range VIN 2.5 5.5 V VIN Range (Note 13) 5
VIN Shutdown Current ISD 1 µA EN low (Note 12 for NCP6324) 5
Output Voltage Range VOUT 0.6 V Note 10 5
FB Voltage VFB 594 600 606 mV PWM Mode 5
Output Current Capability IOUTMAX 2 A Note 10 5
Output Peak Current Limit P-Channel ILIMP 2.3 2.8 3.3 A P-Channel 5
VIN UVLO Falling Threshold VINUV- 2.4 V 5
VIN UVLO Hysteresis VINHYS 60 140 200 mV 5
Power Good Low Threshold VPGL 87 90 92 % VOUT falls down to cross the threshold (percentage of FB voltage) (Note 11) 5
Power Good Hysteresis VPGHYS 0 5 7 % VOUT rises up to cross the threshold (percentage of Power Good Low Threshold (VPGL) voltage) (Note 11) 5
Power Good Pin Low Voltage VPG_L 0.3 V Voltage at PG pin with 5 mA sink current (Note 11) 5
Power Good Pin Leakage Current PG_LK 100 nA 3.6 V at PG pin when power good valid (Note 11) 5
High-Side MOSFET ON Resistance RON_H 160 200 mΩ VIN = 3.6 V (Note 12 for NCP6324) 5
Low-Side MOSFET ON Resistance RON_L 110 140 mΩ VIN = 3.6 V (Note 12 for NCP6324) 5
Normal Operation Frequency FSW 2.7 3 3.3 MHz 6
Start Time TSTART 0 0.18 1 ms Time from EN to 90% of output voltage target 6
EN Input High Voltage VEN_H 1.1 V 6
EN Input Low Voltage VEN_L 0.4 V 6
EN Input Bias Current IEN_BIAS 0.1 1 µA 6
Internal Output Discharge Resistance from SW to PGND R_DIS 75 500 700 Ω 6

CAD (KiCad official)

  • Symbol: NCP6324BMTAATBG
  • Footprint: Package_DFN_QFN:WDFN-8-1EP_2x2mm_P0.5mm_EP0.8x1.2mm
  • 3D model: WDFN-8(2x2) (KiCad packages3D, STEP)
  • 3D model files: ncp6324bmtaatbg-etched.step / ncp6324bmtaatbg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp6324bmtaatbg.step / ncp6324bmtaatbg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (17 pp, sha256 6827ebbff39b39c4, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF