NCP3420DR2G

{
  "slug": "ncp3420dr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "motor driver ics",
    "ncp3420dr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncp3420dr2g.kicad_sym",
    "ncp3420dr2g.kicad_mod",
    "ncp3420dr2g.glb",
    "ncp3420dr2g.step",
    "ncp3420dr2g.lbr",
    "docs/hero.png",
    "docs/ncp3420dr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ncp3420dr2g-hero.glb",
    "ncp3420dr2g-hero.overlay.json",
    "ncp3420dr2g-etched.glb"
  ],
  "component": {
    "mpn": "NCP3420DR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Motor Driver ICs",
    "subcategory": "Gate Drivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881957198942208",
    "parts": {
      "symbol": "ncp3420dr2g.kicad_sym",
      "footprint": "ncp3420dr2g.kicad_mod",
      "model_3d": "ncp3420dr2g-hero.glb",
      "model_3d_plain": "ncp3420dr2g-etched.glb",
      "model_3d_step": "ncp3420dr2g-etched.step",
      "model_3d_step_plain": "ncp3420dr2g.step",
      "lbr": "ncp3420dr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C154600"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T16:05:44Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BST",
        "type": "power_in",
        "description": "Upper MOSFET floating bootstrap supply; a capacitor between BST and SW holds the bootstrap voltage for the high-side MOSFET, with a recommended value between 100 nF and 1.0 µF, and an external diode is required."
      },
      {
        "number": "2",
        "name": "IN",
        "type": "input",
        "description": "Logic-level PWM input with primary control of the drive outputs; input high requires at least 2.0 V and input low is 0.8 V maximum, with absolute maximum rating of 6.5 V."
      },
      {
        "number": "3",
        "name": "OD",
        "type": "input",
        "description": "Output Disable input; when low, normal operation is disabled and DRVH and DRVL are forced low, with input high at least 2.0 V, input low at most 0.8 V, and absolute maximum rating of 6.5 V."
      },
      {
        "number": "4",
        "name": "VCC",
        "type": "power_in",
        "description": "Input supply with a supply voltage range of 4.6 V to 13.2 V (absolute maximum 15 V), requiring a 1.0 µF ceramic capacitor from this pin to PGND."
      },
      {
        "number": "5",
        "name": "DRVL",
        "type": "output",
        "description": "Output drive for the lower (low-side) MOSFET, referenced to PGND and powered from VCC."
      },
      {
        "number": "6",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground, to be closely connected to the source of the lower MOSFET."
      },
      {
        "number": "7",
        "name": "SWN",
        "type": "passive",
        "description": "Switch node, connected to the source of the upper MOSFET and serving as the bootstrap supply return; absolute maximum 35 V DC, 40 V for under 50 ns, and -5.0 V DC."
      },
      {
        "number": "8",
        "name": "DRVH",
        "type": "output",
        "description": "Output drive for the upper (high-side) MOSFET, referenced to SW and powered from BST."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet text reads '1.0 F' for the capacitor values; the micro symbol appears to have been los; Pin 7 is named SWN in the pin table but SW elsewhere in the datasheet. Its KiCad type (passive) is m; Pin types for BST (power_in) and the driver outputs (output) are classifications made from their fun"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0561,
        "at": "2026-10-18T16:04:01"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881957198942208",
        "pages": 9,
        "sha256": "ff86d43935c9d6be",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncp3420dr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
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        "footprint_binding": "identity",
        "sha256": "c3e49d2e6b84fb60dccdf84c9704666530f3375ea6128615637983f2aae369a2",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}