main
Ray Publish 0.1.0 b285f9c 8d ago
{
  "slug": "ncp1631dr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ncp1631dr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ncp1631dr2g.kicad_sym",
    "ncp1631dr2g.kicad_mod",
    "ncp1631dr2g.glb",
    "ncp1631dr2g.step",
    "ncp1631dr2g.lbr",
    "docs/hero.png",
    "docs/ncp1631dr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ncp1631dr2g-hero.glb",
    "ncp1631dr2g-hero.overlay.json",
    "ncp1631dr2g-etched.glb"
  ],
  "component": {
    "mpn": "NCP1631DR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Power Management (PMIC)",
    "subcategory": "AC-DC Controllers And Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590223417505832960",
    "parts": {
      "symbol": "ncp1631dr2g.kicad_sym",
      "footprint": "ncp1631dr2g.kicad_mod",
      "model_3d": "ncp1631dr2g-hero.glb",
      "model_3d_plain": "ncp1631dr2g-etched.glb",
      "model_3d_step": "ncp1631dr2g-etched.step",
      "model_3d_step_plain": "ncp1631dr2g.step",
      "lbr": "ncp1631dr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C154590"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T17:35:29Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "ZCD2",
        "type": "input",
        "description": "Zero current detection input for phase 2 of the interleaved PFC stage; apply the auxiliary winding voltage to detect inductor core reset and the MOSFET drain-source valley."
      },
      {
        "number": "2",
        "name": "FB",
        "type": "input",
        "description": "Receives a portion of the pre-converter output voltage for regulation and 'output low' detection (VOUTL), which speeds up the loop response when the output drops below 95.5% of the wished level."
      },
      {
        "number": "3",
        "name": "Rt",
        "type": "passive",
        "description": "A resistor between this pin and ground adjusts the maximum on-time for both phases and hence the maximum power the PFC stage can deliver."
      },
      {
        "number": "4",
        "name": "OSC",
        "type": "passive",
        "description": "Connect a capacitor to set the clamp frequency of the PFC stage; the circuit delays the next cycle until the core is reset, so the stage can operate in Critical Conduction Mode."
      },
      {
        "number": "5",
        "name": "Vcontrol",
        "type": "output",
        "description": "Error amplifier output; the capacitor to ground sets the regulation loop bandwidth (typically below 20 Hz), and the pin is grounded when the circuit is off to give a soft-start."
      },
      {
        "number": "6",
        "name": "FFOLD",
        "type": "passive",
        "description": "A resistor to ground adjusts the oscillator charge current, clamped not to exceed 100 µA and proportional to power level, for frequency fold-back at light load."
      },
      {
        "number": "7",
        "name": "BO",
        "type": "input",
        "description": "Brown-out detection input fed with an averaged portion of the input voltage; a 50-ms internal delay blanks short mains interruptions, a 7-µA current source gives programmable hysteresis, and grounding the pin disables the part."
      },
      {
        "number": "8",
        "name": "OVP / UVP",
        "type": "input",
        "description": "Output over/under-voltage sense; the circuit turns off when the pin goes below 480 mV (UVP) and disables the drive while the pin exceeds 2.5 V (OVP)."
      },
      {
        "number": "9",
        "name": "CS",
        "type": "input",
        "description": "Monitors a negative voltage proportional to the coil current, used to limit the maximum coil current and protect against in-rush currents."
      },
      {
        "number": "10",
        "name": "Latch",
        "type": "input",
        "description": "Applying a voltage higher than 2.5 V latches off the circuit; reset by a brown-out detection or by forcing VCC below VCCRST (4 V typically)."
      },
      {
        "number": "11",
        "name": "DRV2",
        "type": "output",
        "description": "Gate drive output for phase 2 of the interleaved PFC stage, a totem pole drive with +0.5/-0.8 A capability."
      },
      {
        "number": "12",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply of the IC; starts operating when VCC exceeds 12 V and turns off below 10 V (typical), with an operating range of 9.5 V to 20 V after start-up."
      },
      {
        "number": "13",
        "name": "GND",
        "type": "power_in",
        "description": "Connect to the pre-converter ground."
      },
      {
        "number": "14",
        "name": "DRV1",
        "type": "output",
        "description": "Gate drive output for phase 1 of the interleaved PFC stage, a totem pole drive with +0.5/-0.8 A capability."
      },
      {
        "number": "15",
        "name": "REF5V/pfcOK",
        "type": "output",
        "description": "High (5 V) when the PFC stage is in normal steady state and low otherwise, informing the downstream converter that the PFC stage is ready."
      },
      {
        "number": "16",
        "name": "ZCD1",
        "type": "input",
        "description": "Zero current detection input for phase 1 of the interleaved PFC stage; apply the auxiliary winding voltage to detect inductor core reset and the MOSFET drain-source valley."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 8 (OVP/UVP) description in Table 3 refers to Vpin9 going below 480 mV, but pin 9 is CS in the sa; Pin-number-to-name mapping was taken from Table 3 (Detailed Pin Description) because the Pin Assignm; The micro symbol is missing in the extracted text (pin 6 clamp shown as '100 A', pin 7 current as '7"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0694,
        "at": "2026-10-18T17:32:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590223417505832960",
        "pages": 25,
        "sha256": "8db8af2fb647e499",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ncp1631dr2g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ncp1631dr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ef784329f8bcf81e68b7934f7e7dfb8d53b568afaf69486a0894a9c096d7cad6",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}