NB3N511DR2G

{
  "slug": "nb3n511dr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Clock Generators, PLLs, Frequency Synthesizers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock-timing",
    "nb3n511dr2g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "nb3n511dr2g.kicad_sym",
    "nb3n511dr2g.kicad_mod",
    "nb3n511dr2g.glb",
    "nb3n511dr2g.step",
    "nb3n511dr2g.lbr",
    "docs/hero.png",
    "docs/nb3n511dr2g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "nb3n511dr2g-hero.glb",
    "nb3n511dr2g-hero.overlay.json",
    "nb3n511dr2g-etched.glb"
  ],
  "component": {
    "mpn": "NB3N511DR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8559520338158641152",
    "parts": {
      "symbol": "nb3n511dr2g.kicad_sym",
      "footprint": "nb3n511dr2g.kicad_mod",
      "model_3d": "nb3n511dr2g-hero.glb",
      "model_3d_plain": "nb3n511dr2g-etched.glb",
      "model_3d_step": "nb3n511dr2g-etched.step",
      "model_3d_step_plain": "nb3n511dr2g.step",
      "lbr": "nb3n511dr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C905213",
      "digikey": "NB3N511DR2GOSTR-ND",
      "mouser": "863-NB3N511DR2G"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T21:45:09Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "NB3N511DR2GOSTR-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "863-NB3N511DR2G",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "X1/ICLK",
        "type": "input",
        "description": "Crystal or external reference clock input; crystal range is 5 to 32 MHz and clock input range is 1 to 50 MHz (Table 7)."
      },
      {
        "number": "2",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply: 3.3 V ±10% (3.0 to 3.6 V) or 5.0 V ±5% (4.75 to 5.25 V), with a 7 V absolute maximum rating."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground, 0 V."
      },
      {
        "number": "4",
        "name": "S1",
        "type": "input",
        "description": "Three-level multiplier select input; connect to VDD, GND, or leave open (open defaults to VDD/2, the M state)."
      },
      {
        "number": "5",
        "name": "CLKOUT",
        "type": "output",
        "description": "Clock output, TTL/CMOS compatible with 25 mA TTL-level drive and a 45% to 55% duty cycle; it goes high impedance when OE is low."
      },
      {
        "number": "6",
        "name": "S0",
        "type": "input",
        "description": "Three-level multiplier select input; connect to VDD, GND, or leave open (open defaults to VDD/2, the M state)."
      },
      {
        "number": "7",
        "name": "OE",
        "type": "input",
        "description": "Output enable with internal 270 kΩ pull-up; CLKOUT is high impedance when OE is low, with VIH of 2.0 V minimum and VIL of 0.8 V maximum."
      },
      {
        "number": "8",
        "name": "X2",
        "type": "passive",
        "description": "Crystal input; leave open when an external clock drives X1/ICLK, otherwise use a load capacitor to GND per the crystal load requirement."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 2 lists pins 1 and 8 as 'Crystal' / 'Crystal or LVCMOS/LVTTL Input' rather than a KiCad class;; Table 2 lists S0 and S1 as 'Three level Input' and the text gives VIH/VIL limits, but no three-level"
        ],
        "pages_sent": 8,
        "cost_usd": 0.011,
        "at": "2026-10-20T21:38:26"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8559520338158641152",
        "pages": 8,
        "sha256": "0c4585bebb4ce46c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "nb3n511dr2g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "nb3n511dr2g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2cd50f799b3392fc8a8ca85416c82fa5f1bdffc883b31da4a5a88eb456ee30c3",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}