component
NB3N511DR2G
Public Made by Adomby adom
onsemi Clock Generators, PLLs, Frequency Synthesizers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| nb3n511dr2g-etched.glb | 7d ago |
| nb3n511dr2g-etched.step | 7d ago |
| nb3n511dr2g-hero.glb | 7d ago |
| nb3n511dr2g-hero.overlay.json | 7d ago |
| nb3n511dr2g.glb | 7d ago |
| nb3n511dr2g.kicad_mod | 7d ago |
| nb3n511dr2g.kicad_sym | 7d ago |
| nb3n511dr2g.lbr | 7d ago |
| nb3n511dr2g.step | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
NB3N511DR2G
onsemi · Clock Generators, PLLs, Frequency Synthesizers · SOIC-8
NB3N511DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1/ICLK | input | Crystal or external reference clock input; crystal range is 5 to 32 MHz and clock input range is 1 to 50 MHz (Table 7). |
| 2 | VDD | power_in | Positive supply: 3.3 V ±10% (3.0 to 3.6 V) or 5.0 V ±5% (4.75 to 5.25 V), with a 7 V absolute maximum rating. |
| 3 | GND | power_in | Ground, 0 V. |
| 4 | S1 | input | Three-level multiplier select input; connect to VDD, GND, or leave open (open defaults to VDD/2, the M state). |
| 5 | CLKOUT | output | Clock output, TTL/CMOS compatible with 25 mA TTL-level drive and a 45% to 55% duty cycle; it goes high impedance when OE is low. |
| 6 | S0 | input | Three-level multiplier select input; connect to VDD, GND, or leave open (open defaults to VDD/2, the M state). |
| 7 | OE | input | Output enable with internal 270 kΩ pull-up; CLKOUT is high impedance when OE is low, with VIH of 2.0 V minimum and VIL of 0.8 V maximum. |
| 8 | X2 | passive | Crystal input; leave open when an external clock drives X1/ICLK, otherwise use a load capacitor to GND per the crystal load requirement. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Positive Power Supply | VDD | 7 | V | GND = 0 V | 3 | ||
| Input and Output Voltages | VIO | -0.5 | V | 3 | |||
| Operating Temperature Range | TA | -40 | 85 | °C | 3 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 3 | ||
| Thermal Resistance (Junction-to-Ambient), SOIC-8 | JA | 190 | °C/W | 0 lfpm | 3 | ||
| Thermal Resistance (Junction-to-Ambient), SOIC-8 | JA | 130 | °C/W | 500 lfpm | 3 | ||
| Thermal Resistance (Junction-to-Case), SOIC-8 | JC | 41 | 44 | °C/W | Note 2 | 3 | |
| Wave Solder Pb-Free | Tsol | 265 | °C | 3 | |||
| Operating Voltage | VDD | 4.75 | 5.25 | V | VDD = 5 V | 4 | |
| Operating Voltage | VDD | 3 | 3.6 | V | VDD = 3.3 V | 4 | |
| Power Supply Current | IDD | 9 | mA | Inputs and outputs open, CLKOUT operating at 100 MHz (with 20 MHz crystal), VDD = 5 V | 4 | ||
| Power Supply Current | IDD | 8 | mA | Inputs and outputs open, CLKOUT operating at 100 MHz (with 20 MHz crystal), VDD = 3.3 V | 4 | ||
| Output HIGH Voltage | VOH | 2.4 | V | IOH = −25 mA, TTL High | 4 | ||
| Output LOW Voltage | VOL | 0.4 | V | IOL = 25 mA | 4 | ||
| Input HIGH Voltage, OE (pin 7) | VIH | 2 | V | 4 | |||
| Input LOW Voltage, OE (pin 7) | VIL | 0.8 | V | 4 | |||
| Input LOW Voltage, S0, S1 | VIL | 0.5 | V | 4 | |||
| Input Capacitance, S0, S1 and OE | Cin | 4 | pF | 4 | |||
| Output Short Circuit Current, CLKOUT | ISC | -70 | 70 | mA | 4 | ||
| Crystal Input Frequency | fXtal | 5 | 32 | MHz | Note 3 | 4 | |
| Clock Input Frequency | fCLKIN | 1 | 50 | MHz | 4 | ||
| Output Frequency Range | fOUT | 4 | 200 | MHz | VDD = 4.25 to 5.25 V (5.0 V ± 5%) | 4 | |
| DC Output Clock Duty Cycle | 45 | 50 | 55 | % | at 1.5 V | 4 | |
| Output enable time, OE high to output on | OEH | 50 | ns | 4 | |||
| Output disable time, OE low to tri-state | OEL | 50 | ns | 4 | |||
| Period Jitter (rms) | tjitter (rms) | 25 | ps | 1 sigma | 4 | ||
| Total Period Jitter (peak-to-peak) | tjitter (pk-to-pk) | -70 | 70 | ps | 4 | ||
| Output rise/fall time (0.8 V to 2.0 V) | tr/tf | 1 | 1.5 | ns | measured with 15 pF load | 4 | |
| Shunt Capacitance | 5 | pF | Recommended crystal parameter | 5 | |||
| Equivalent Series Resistance (ESR) | ESR | 50 | Ω | Recommended crystal parameter | 5 | ||
| Correlation Drive Level | 1 | mW | Recommended crystal parameter | 5 | |||
| Crystal Operating Range | -40 | 85 | °C | Recommended crystal parameter | 5 |
CAD (KiCad official)
- Symbol:
NB3N511DR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
nb3n511dr2g-etched.step/nb3n511dr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nb3n511dr2g.step/nb3n511dr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
0c4585bebb4ce46c, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).