N32G435KBL7

{
  "slug": "n32g435kbl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Nations Technologies Inc Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "n32g435kbl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "n32g435kbl7.kicad_sym",
    "n32g435kbl7.kicad_mod",
    "n32g435kbl7.glb",
    "n32g435kbl7.step",
    "n32g435kbl7.lbr",
    "docs/hero.png",
    "docs/n32g435kbl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "n32g435kbl7-hero.glb",
    "n32g435kbl7-hero.overlay.json",
    "n32g435kbl7-etched.glb"
  ],
  "component": {
    "mpn": "N32G435KBL7",
    "manufacturer": "Nations Technologies Inc",
    "package": "LQFP-32(7x7)",
    "pin_count": 32,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836817730985984",
    "parts": {
      "symbol": "n32g435kbl7.kicad_sym",
      "footprint": "n32g435kbl7.kicad_mod",
      "model_3d": "n32g435kbl7-hero.glb",
      "model_3d_plain": "n32g435kbl7-etched.glb",
      "model_3d_step": "n32g435kbl7-etched.step",
      "model_3d_step_plain": "n32g435kbl7.step",
      "lbr": "n32g435kbl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C3003081",
      "digikey": "6384-N32G435KBL7-ND"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T07:24:45Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "6384-N32G435KBL7-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply for the I/O pins and internal voltage regulator, 1.8 V to 3.6 V."
      },
      {
        "number": "2",
        "name": "PD14-OSC_IN",
        "type": "bidirectional",
        "description": "GPIO PD14 (TTa 3.3 V I/O, not fail-safe) that also serves as the HSE oscillator input OSC_IN; alternates include USART2_TX, I2C2_SDA and TIM1_CH3N."
      },
      {
        "number": "3",
        "name": "PD15-OSC_OUT",
        "type": "bidirectional",
        "description": "GPIO PD15 (TTa 3.3 V I/O, not fail-safe) that also serves as the HSE oscillator output OSC_OUT; alternates include USART2_RX and I2C2_SCL."
      },
      {
        "number": "4",
        "name": "NRST",
        "type": "input",
        "description": "Active-low external reset input with internal pull-up of 30 to 70 kΩ (50 kΩ typ. at 3.3 V); pulses shorter than 100 ns are filtered."
      },
      {
        "number": "5",
        "name": "VDDA/VREF+",
        "type": "power_in",
        "description": "Analog supply for the ADC, DAC, OPAMP and COMP at 1.8 V to 3.6 V, which must be connected to VDD; also the ADC/DAC positive reference."
      },
      {
        "number": "6",
        "name": "PA0",
        "type": "bidirectional",
        "description": "GPIO PA0 (TTa 3.3 V I/O, fail-safe supported); default analog ADC_IN1 with alternates including TIM2_CH1, SPI1_MISO and WKUP1 wake-up."
      },
      {
        "number": "7",
        "name": "PA1",
        "type": "bidirectional",
        "description": "GPIO PA1 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN2 and OPAMP1_VINP, with alternates including USART2_RTS, LPUART_TX and TIM5_CH2."
      },
      {
        "number": "8",
        "name": "PA2",
        "type": "bidirectional",
        "description": "GPIO PA2 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN3 and OPAMP1_VOUT, with alternates including USART2_TX, TIM5_CH3, I2C2_SDA and COMP2_OUT."
      },
      {
        "number": "9",
        "name": "PA3",
        "type": "bidirectional",
        "description": "GPIO PA3 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN4 and OPAMP1_VINM, with alternates including USART2_RX, LPUART_RX, TIM5_CH4 and I2C2_SCL."
      },
      {
        "number": "10",
        "name": "PA4",
        "type": "bidirectional",
        "description": "GPIO PA4 (TTa 3.3 V I/O, not fail-safe); analog DAC_OUT and ADC_IN5, with alternates including USART2_CK, SPI1_NSS, I2S1_WS and I2C1_SCL."
      },
      {
        "number": "11",
        "name": "PA5",
        "type": "bidirectional",
        "description": "GPIO PA5 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN6, with alternates including SPI1_SCK, I2S1_CK, I2C1_SDA and USART1_RX."
      },
      {
        "number": "12",
        "name": "PA6",
        "type": "bidirectional",
        "description": "GPIO PA6 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN7 and OPAMP2_VOUT, with alternates including SPI1_MISO, I2S1_MCK, TIM3_CH1 and TIM1_BKIN."
      },
      {
        "number": "13",
        "name": "PA7",
        "type": "bidirectional",
        "description": "GPIO PA7 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN8, with alternates including SPI1_MOSI, I2S1_SD, TIM3_CH2 and TIM1_CH1N."
      },
      {
        "number": "14",
        "name": "PB0",
        "type": "bidirectional",
        "description": "GPIO PB0 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN9 and OPAMP2_VINM, with alternates including TIM1_CH2N, TIM3_CH3 and UART4_TX."
      },
      {
        "number": "15",
        "name": "PB1",
        "type": "bidirectional",
        "description": "GPIO PB1 (TTa 3.3 V I/O, fail-safe supported); analog ADC_IN10, with alternates including LPUART_RTS, TIM1_CH3N, TIM3_CH4 and UART4_RX."
      },
      {
        "number": "16",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V) for the digital core and I/O."
      },
      {
        "number": "17",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply for the I/O pins and internal voltage regulator, 1.8 V to 3.6 V."
      },
      {
        "number": "18",
        "name": "PA8",
        "type": "bidirectional",
        "description": "GPIO PA8 (TTa 3.3 V I/O, fail-safe supported); alternates include USART1_CK, TIM1_CH1, I2C2_SMBA, MCO and the WKUP0 wake-up input."
      },
      {
        "number": "19",
        "name": "PA9",
        "type": "bidirectional",
        "description": "GPIO PA9 (TTa 3.3 V I/O, fail-safe supported); alternates include USART1_TX, I2C2_SCL and TIM1_CH2."
      },
      {
        "number": "20",
        "name": "PA10",
        "type": "bidirectional",
        "description": "GPIO PA10 (TTa 3.3 V I/O, fail-safe supported); alternates include USART1_RX, I2C2_SDA, SPI1_SCK, I2S1_CK and TIM1_CH3."
      },
      {
        "number": "21",
        "name": "PA11",
        "type": "bidirectional",
        "description": "GPIO PA11 (TTa 3.3 V I/O, not fail-safe); alternates include USART1_CTS, CAN_RX, TIM1_CH4 and COMP1_OUT, and it also serves as USB_DM."
      },
      {
        "number": "22",
        "name": "PA12",
        "type": "bidirectional",
        "description": "GPIO PA12 (TTa 3.3 V I/O, not fail-safe); alternates include USART1_RTS, CAN_TX, TIM1_ETR and COMP2_OUT, and it also serves as USB_DP."
      },
      {
        "number": "23",
        "name": "PA13",
        "type": "bidirectional",
        "description": "GPIO PA13 (TTa 3.3 V I/O, fail-safe supported); default SWDIO/JTMS debug function after reset, with alternates SPI2_NSS and I2S2_WS."
      },
      {
        "number": "24",
        "name": "PA14",
        "type": "bidirectional",
        "description": "GPIO PA14 (TTa 3.3 V I/O, fail-safe supported); default SWCLK/JTCK debug function after reset, with alternates USART2_CK, I2C1_SDA and COMP2_OUT."
      },
      {
        "number": "25",
        "name": "PA15",
        "type": "bidirectional",
        "description": "GPIO PA15 (TTa 3.3 V I/O, fail-safe supported); default JTDI debug function (pull-up after reset), with alternates USART2_CTS, SPI2_NSS, I2S2_WS and TIM2_CH1."
      },
      {
        "number": "26",
        "name": "PB3",
        "type": "bidirectional",
        "description": "GPIO PB3 (TTa 3.3 V I/O, fail-safe supported); default JTDO/TRACESWO debug function, with alternates USART2_RTS, SPI1_SCK, I2S1_CK and TIM2_CH2."
      },
      {
        "number": "27",
        "name": "PB4",
        "type": "bidirectional",
        "description": "GPIO PB4 (TTa 3.3 V I/O, fail-safe supported); default NJTRST debug function, with alternates USART2_TX, SPI1_MISO, TIM3_CH1 and UART5_TX."
      },
      {
        "number": "28",
        "name": "PB5",
        "type": "bidirectional",
        "description": "GPIO PB5 (TTa 3.3 V I/O, fail-safe supported); alternates include USART2_RX, I2C1_SMBA, SPI1_MOSI, I2S1_SD, TIM3_CH2 and LPTIM_IN1."
      },
      {
        "number": "29",
        "name": "PB6",
        "type": "bidirectional",
        "description": "GPIO PB6 (TTa 3.3 V I/O, fail-safe supported); alternates include USART1_TX, LPUART_TX, I2C1_SCL, SPI1_NSS, TIM4_CH1 and LPTIM_ETR."
      },
      {
        "number": "30",
        "name": "PB7",
        "type": "bidirectional",
        "description": "GPIO PB7 (TTa 3.3 V I/O, fail-safe supported); alternates include USART1_RX, LPUART_RX, I2C1_SDA, TIM4_CH2, LPTIM_IN2 and PVD_IN."
      },
      {
        "number": "31",
        "name": "BOOT0/PD0",
        "type": "bidirectional",
        "description": "Boot mode select input BOOT0 (input pull-down, sampled at reset) that can also be used as GPIO PD0 (TTa 3.3 V I/O, fail-safe supported)."
      },
      {
        "number": "32",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V) for the digital core and I/O."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 3-1 prints LQFP32 = 14 for PB1, which duplicates PB0. Pin 15 is assigned here because it is th; Table 3-1 VDD row extracts as '17 - 24 32 VDD', so the LQFP32 cell is not cleanly aligned. Pin 17 is; Table 3-1 footnote 3 (page 54) lists PD14, PD15, PA11, PA12, PA4 and PB2 as not supporting fail-safe"
        ],
        "pages_sent": 67,
        "cost_usd": 0.3063,
        "at": "2026-10-19T07:24:24"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836817730985984",
        "pages": 88,
        "sha256": "be3b80dd8e09ff8d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "n32g435kbl7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "n32g435kbl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7109fd67b54a4bb915797d8f76892cc6f8f056096c83d47479de13be5616f82c",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}