component
N32G003F5S7
Public Made by Adomby adom
Nations(国民技术) Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "n32g003f5s7",
"version": "0.1.0",
"type": "component",
"description": "Nations(国民技术) Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"n32g003f5s7",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"n32g003f5s7.kicad_sym",
"n32g003f5s7.kicad_mod",
"n32g003f5s7.glb",
"n32g003f5s7.step",
"n32g003f5s7.lbr",
"docs/hero.png",
"docs/n32g003f5s7-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"n32g003f5s7-hero.glb",
"n32g003f5s7-hero.overlay.json",
"n32g003f5s7-etched.glb"
],
"component": {
"mpn": "N32G003F5S7",
"manufacturer": "Nations(国民技术)",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903421694394368",
"parts": {
"symbol": "n32g003f5s7.kicad_sym",
"footprint": "n32g003f5s7.kicad_mod",
"model_3d": "n32g003f5s7-hero.glb",
"model_3d_plain": "n32g003f5s7-etched.glb",
"model_3d_step": "n32g003f5s7-etched.step",
"model_3d_step_plain": "n32g003f5s7.step",
"lbr": "n32g003f5s7.lbr"
},
"distributor_links": {
"lcsc": "C7431135"
},
"distributor_check": {
"checked_at": "2026-10-17T12:19:14Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "PA14",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions TIM1_CH2, TIM1_ETR, SPI_SCK, UART1_TX, BEEP and analog input AIN6; it is in analog input mode during and just after reset."
},
{
"number": "2",
"name": "PB0",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions UART1_TX, SPI_MISO, TIM1_CH1, BEEPN, EVENT_OUT, AIN7 and COMP_INP; it is in analog input mode during and just after reset."
},
{
"number": "3",
"name": "PB1",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions UART1_RX, SPI_MOSI, TIM1_CH4, TIM3_ETR, EVENT_OUT, AIN8 and COMP_INM; it is in analog input mode during and just after reset."
},
{
"number": "4",
"name": "NRST/PA0",
"type": "bidirectional",
"description": "Bidirectional reset pin with embedded weak pull-up (RPU 30 to 70 kΩ for 2 V to 5.5 V) that can be configured by option byte as the NRST pin or as a normal GPIO PA0; NRST input low level must be at or below 0.3 VDD."
},
{
"number": "5",
"name": "PA1",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions UART2_RX, I2C_SDA, TIM1_CH3, TIM3_CH1, TIM1_BKIN, WKUP0 (Power Down wake-up input), and AIN0; it is in analog input mode during and just after reset."
},
{
"number": "6",
"name": "PA2",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions UART1_TX, UART2_TX, I2C_SCL, TIM1_CH3N, TIM3_CH2, WKUP1 (Power Down wake-up input), and AIN1; it is in analog input mode during and just after reset."
},
{
"number": "7",
"name": "VSS",
"type": "power_in",
"description": "Power ground reference for all voltages; all VSS and VDD pins must stay connected to the supply system within its allowed range, and the difference between ground pins must not exceed 50 mV."
},
{
"number": "8",
"name": "PA8/SWDIO",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) used as the SWD data pin SWDIO, which is set to input pull-up after reset, with alternate functions UART2_TX, I2C_SDA, SPI_NSS, TIM1_CH4 and COMP_OUT."
},
{
"number": "9",
"name": "VDD",
"type": "power_in",
"description": "Power supply with a standard operating range of 2 V to 5.5 V; the absolute maximum VDD to VSS is -0.3 V to 5.5 V."
},
{
"number": "10",
"name": "PA3",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions UART1_RX, SPI_NSS, TIM1_CH3N, TIM3_CH1, TIM3_CH2 and TIM1_CH4; it is in analog input mode during and just after reset."
},
{
"number": "11",
"name": "PA5",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions I2C_SDA, TIM1_BKIN, TIM1_CH1N, AIN2 and COMP_INP; it is in analog input mode during and just after reset."
},
{
"number": "12",
"name": "PA4",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions I2C_SCL, TIM1_CH3N, EVENT_OUT and COMP_INM; it is in analog input mode during and just after reset."
},
{
"number": "13",
"name": "PA11",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions TIM1_CH1, TIM1_CH1N, TIM1_CH3, TIM3_CH1, TIM3_CH2 and TIM1_CH4; it is in analog input mode during and just after reset."
},
{
"number": "14",
"name": "PA13",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions MCO, TIM1_CH1N, TIM1_CH2N, TIM1_CH4, TIM3_CH1, TIM3_CH2 and AIN5; it is in analog input mode during and just after reset."
},
{
"number": "15",
"name": "PA15",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions SPI_SCK, TIM1_CH2, TIM1_ETR, TIM3_CH1, TIM3_CH2 and TIM1_CH4; it is in analog input mode during and just after reset."
},
{
"number": "16",
"name": "PA6",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions SPI_MOSI, TIM1_CH1, TIM1_CH2N, TIM3_CH1, TIM3_CH2, TIM1_CH4 and TIM3_ETR; it is in analog input mode during and just after reset."
},
{
"number": "17",
"name": "PA7",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions SPI_MISO, TIM1_CH2, TIM1_CH3, TIM3_CH1, TIM3_CH2, TIM1_CH4 and UART2_RX; it is in analog input mode during and just after reset."
},
{
"number": "18",
"name": "PA9/SWCLK",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) used as the SWD clock pin SWCLK, which is set to input pull-down after reset, with alternate functions UART2_TX, I2C_SCL, TIM1_BKIN, TIM3_ETR and UART2_RX (UART2_RX is not supported on A-version chips)."
},
{
"number": "19",
"name": "PA10",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions TIM1_CH3, TIM1_CH3N, TIM3_CH1, TIM3_CH2, TIM1_CH4 and AIN3; it is in analog input mode during and just after reset."
},
{
"number": "20",
"name": "PA12",
"type": "bidirectional",
"description": "Standard 5 V I/O (TC) with alternate functions TIM1_CH2, TIM1_CH2N, TIM3_CH1, TIM3_CH2, TIM1_CH4, UART1_RX and AIN4; it is in analog input mode during and just after reset."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet's ordering table lists N32G003F5S7 and N32G003F5Q7 but does not explicitly state that ; The TSSOP20 pin-diagram text (page 19) is garbled in extraction, so the left/right pin-to-number map; Table 3-1 lists PA8 and PA9 as 'PA8(3)(SWDIO)' and 'PA9(3)(SWCLK)'; footnote 4 states that A-version"
],
"pages_sent": 33,
"cost_usd": 0.1606,
"at": "2026-10-17T12:17:22"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903421694394368",
"pages": 47,
"sha256": "13a34fa7564124f5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "n32g003f5s7.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-17",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "n32g003f5s7-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c265ed5300404a413e44a39ff0241fdce1aa1cf837299dde26096ff6fbbcf32e",
"checked": "2026-10-17",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}