component
MX25L12833FMI-10G
Public Made by Adomby adom
MXIC Macronix NOR FLASH, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MX25L12833FMI-10G
MXIC Macronix · NOR FLASH · SOIC-16-300mil
MX25L12833FMI-10G from MXIC Macronix, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DNU/SIO3 | bidirectional | Do not use in the 16-pin SOP when QE is 0; when QE is 1 (Quad mode) this pin functions as SIO3 for 4xI/O data input and output and its alternate function is disabled. |
| 2 | VCC | power_in | +3V power supply input. |
| 3 | RESET# | input | Hardware reset pin, active low; an internal pull-up remains active only while this pin is not physically connected in the system. |
| 4 | NC | unconnected | No connection. |
| 5 | NC | unconnected | No connection. |
| 6 | NC | unconnected | No connection. |
| 7 | CS# | input | Chip select; serial access to the device is enabled by CS#, and the device enters standby mode when CS# is high and it is not in operation. |
| 8 | SO/SIO1 | bidirectional | Serial data output for 1xI/O; serial data input and output (SIO1) for 2xI/O or 4xI/O read mode. |
| 9 | WP#/SIO2 | bidirectional | Write protection, active low, in single I/O mode; serial data input and output (SIO2) for 4xI/O read mode, with an internal pull-up active only while not physically connected. |
| 10 | GND | power_in | Ground. |
| 11 | NC | unconnected | No connection. |
| 12 | NC | unconnected | No connection. |
| 13 | NC | unconnected | No connection. |
| 14 | NC | unconnected | No connection. |
| 15 | SI/SIO0 | bidirectional | Serial data input for 1xI/O; serial data input and output (SIO0) for 2xI/O or 4xI/O read mode. |
| 16 | SCLK | input | Clock input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MXIC Macronix |
| Package | SOIC-16-300mil |
| Category | Memory |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Operating Temperature | -40 | 85 | °C | Industrial grade | 73 | ||
| Storage Temperature | -65 | 150 | °C | 73 | |||
| Applied Input Voltage | -0.5 | V | Printed as -0.5V to VCC+0.5V; upper limit depends on VCC | 73 | |||
| Applied Output Voltage | -0.5 | V | Printed as -0.5V to VCC+0.5V; upper limit depends on VCC | 73 | |||
| VCC to Ground Potential | VCC | -0.5 | 4 | V | 73 | ||
| Supply voltage for read, erase and program operations | VCC | 2.7 | 3.6 | V | 4 | ||
| Input Capacitance | CIN | 6 | pF | VIN = 0V | 73 | ||
| Output Capacitance | COUT | 8 | pF | VOUT = 0V | 73 | ||
| Input Load Current | ILI | -2 | 2 | uA | VCC = VCC Max, VIN = VCC or GND | 75 | |
| Output Leakage Current | ILO | -2 | 2 | uA | VCC = VCC Max, VOUT = VCC or GND | 75 | |
| VCC Standby Current | ISB1 | 10 | 50 | uA | VIN = VCC or GND, CS# = VCC | 75 | |
| VCC Read (4 x I/O read, 104MHz row) | ICC1 | 20 | mA | f=104MHz, (4 x I/O read), SCLK=0.1VCC/0.9VCC, SO=Open | 75 | ||
| VCC Program Current (PP) | ICC2 | 14 | 20 | mA | Program in Progress, CS# = VCC | 75 | |
| VCC Write Status Register (WRSR) Current | ICC3 | 10 | 12 | mA | Program status register in progress, CS#=VCC | 75 | |
| VCC Sector/Block (32K, 64K) Erase Current (SE/BE/BE32K) | ICC4 | 14 | 25 | mA | Erase in Progress, CS#=VCC | 75 | |
| VCC Chip Erase Current (CE) | ICC5 | 14 | 25 | mA | Erase in Progress, CS#=VCC | 75 | |
| Input Low Voltage | VIL | -0.5 | 0.8 | V | 75 | ||
| Output Low Voltage | VOL | 0.2 | V | IOL = 100uA | 75 | ||
| Clock Frequency for all commands (except Read) | fSCLK | 133 | MHz | 76 | |||
| Clock Frequency for READ instructions | fRSCLK | 50 | MHz | 76 | |||
| Clock Frequency for 2READ instructions | fTSCLK | 84 | MHz | 76 | |||
| Clock Frequency for 4READ instructions | fQ | 84 | MHz | 76 | |||
| Clock High Time (others, fSCLK) | tCH | 7 | ns | ≤ 66MHz | 76 | ||
| Clock High Time (normal read) | tCH | 7 | ns | Normal Read (fRSCLK) | 76 | ||
| Clock Low Time (others, fSCLK) | tCL | 7 | ns | ≤ 66MHz | 76 | ||
| Clock Low Time (normal read) | tCL | 7 | ns | Normal Read (fRSCLK) | 76 | ||
| Clock Rise Time (peak to peak) | tCLCH | 0.1 | V/ns | 76 | |||
| Clock Fall Time (peak to peak) | tCHCL | 0.1 | V/ns | 76 | |||
| CS# Active Setup Time (relative to SCLK) | tSLCH | 3 | ns | 76 | |||
| CS# Not Active Hold Time (relative to SCLK) | tCHSL | 3 | ns | 76 | |||
| Data In Setup Time | tDVCH | 2 | ns | 76 | |||
| Data In Hold Time | tCHDX | 2 | ns | 76 | |||
| CS# Active Hold Time (relative to SCLK) | tCHSH | 3 | ns | 76 | |||
| CS# Not Active Setup Time (relative to SCLK) | tSHCH | 3 | ns | 76 | |||
| CS# Deselect Time | tSHSL | 7 | ns | From Read to next Read | 76 | ||
| CS# Deselect Time | tSHSL | 30 | ns | From Write/Erase/Program to Read Status Register | 76 | ||
| Output Disable Time | tSHQZ | 8 | ns | 76 | |||
| Clock Low to Output Valid | tCLQV | 8 | ns | Loading: 30pF | 76 | ||
| Clock Low to Output Valid | tCLQV | 6 | ns | Loading: 15pF | 76 | ||
| Output Hold Time | tCLQX | 1 | ns | Loading: 30pF | 76 | ||
| Write Protect Setup Time | tWHSL | 20 | ns | 76 | |||
| Write Protect Hold Time | tSHWL | 100 | ns | 76 | |||
| CS# High to Deep Power-down Mode | tDP | 10 | us | 76 | |||
| CS# High to Standby Mode without Electronic Signature Read | tRES1 | 30 | us | 76 | |||
| CS# High to Standby Mode with Electronic Signature Read | tRES2 | 30 | us | 76 | |||
| Write Status/Configuration Register Cycle Time | tW | 40 | ms | 76 | |||
| Byte-Program | tBP | 16 | 40 | us | 76 | ||
| Page Program Cycle Time | tPP | 0.33 | 1.2 | ms | 76 | ||
| Sector Erase Cycle Time | tSE | 25 | 120 | ms | 76 | ||
| Block Erase (32KB) Cycle Time | tBE32 | 140 | 650 | ms | 76 | ||
| Block Erase (64KB) Cycle Time | tBE | 250 | 650 | ms | 76 | ||
| Chip Erase Cycle Time | tCE | 26 | 60 | s | 76 | ||
| Erase Suspend Latency | tESL | 25 | us | 76 | |||
| Program Suspend Latency | tPSL | 25 | us | 76 | |||
| Latency between Program Resume and next Suspend | tPRS | 0.3 | 100 | us | 76 | ||
| Latency between Erase Resume and next Suspend | tERS | 0.3 | 400 | us | 76 | ||
| VCC Rise Time | tVR | 500000 | us/V | 78 |
CAD (KiCad official)
- Symbol:
MX25L12833FMI-10G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
mx25l12833fmi-10g-etched.step/mx25l12833fmi-10g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mx25l12833fmi-10g.step/mx25l12833fmi-10g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MXIC Macronix datasheet (90 pp, sha256
b26659f61da53028, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).