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MSPM0L1306SRGER
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSPM0L1306SRGER
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-24(4x4)
MSPM0L1306SRGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA1 | bidirectional | 5-V tolerant open-drain I/O with wakeup from SHUTDOWN, configurable as I2C0_SCL, UART1_RX, or TIMG1_C1. |
| 2 | NRST | input | Active-low reset input pin; must be pulled high to VCC for device operation. |
| 3 | VDD | power_in | Power supply input with recommended operating voltage range 1.62 V to 3.6 V. |
| 4 | VSS | power_in | Ground supply. |
| 5 | PA2/ROSC | bidirectional | External oscillator frequency correction resistor input (100 kΩ ±0.1% required when FCL enabled) or general-purpose digital I/O. |
| 6 | PA3 | bidirectional | General-purpose digital I/O configurable for TIMG2_C0, SPI0_CS1, UART1_CTS, or COMP0_OUT functions. |
| 7 | PA4 | bidirectional | General-purpose digital I/O configurable for TIMG2_C1, SPI0_POCI, or UART1_RTS functions. |
| 8 | PA9 | bidirectional | General-purpose digital I/O configurable for UART0_RX, SPI0_PICO, UART1_CTS, TIMG2_C1, or CLK_OUT functions. |
| 9 | PA10 | bidirectional | High-speed general-purpose digital I/O configurable for UART1_TX, SPI0_POCI, I2C0_SDA, TIMG4_C0, or CLK_OUT functions. |
| 10 | PA11 | bidirectional | General-purpose digital I/O configurable for UART1_RX, SPI0_SCK, I2C0_SCL, TIMG4_C1, or COMP0_OUT functions. |
| 11 | PA15/A9 | bidirectional | General-purpose digital I/O or ADC0 analog input 9, configurable for UART1_RTS, I2C1_SCL, SPI0_CS2, or TIMG4_C1 functions. |
| 12 | PA16/A8/OPA1_OUT | bidirectional | General-purpose digital I/O or ADC0 analog input 8, OPA1 output, or Comparator 0 output with multiple peripheral functions. |
| 13 | PA17/OPA1_IN1- | bidirectional | General-purpose digital I/O with wakeup capability, OPA1 inverting terminal input, configurable for UART0_TX, I2C1_SCL, SPI0_SCK, or TIMG4_C0 functions. |
| 14 | PA18/A7/OPA1_IN0+/GPAMP_IN- | bidirectional | General-purpose digital I/O with wakeup capability, ADC0 analog input 7, OPA1 non-inverting input, or GPAMP inverting input with multiple peripheral functions. |
| 15 | PA19/SWDIO | bidirectional | High-speed Serial Wire Debug data I/O pin or general-purpose digital I/O configurable for I2C1_SDA or SPI0_POCI functions. |
| 16 | PA20/A6/COMP0_IN1+/SWCLK | bidirectional | Serial Wire Debug clock input, ADC0 analog input 6, Comparator 0 non-inverting input 1, or general-purpose I/O for I2C/timer functions. |
| 17 | PA21/A5/VREF- | input | External voltage reference ground supply input (required with decoupling capacitor), ADC0 analog input 5, or general-purpose digital I/O. |
| 18 | PA22/A4/GPAMP_OUT/OPA0_OUT | bidirectional | General-purpose digital I/O, ADC0 analog input 4, GPAMP output, or OPA0 output with multiple peripheral functions. |
| 19 | PA23/VREF+ | input | External voltage reference power supply input (requires decoupling capacitor), Comparator 0 inverting input 1, or general-purpose digital I/O. |
| 20 | PA24/A3/OPA0_IN1-/OPA0_IN0- | bidirectional | General-purpose digital I/O, ADC0 analog input 3, OPA0 inverting terminal inputs, configurable for SPI0_CS2, TIMG0_C1, or UART0_RTS functions. |
| 21 | PA25/A2/OPA0_IN0+ | bidirectional | General-purpose digital I/O, ADC0 analog input 2, OPA0 non-inverting terminal input, configurable for TIMG4_C1, UART0_TX, or SPI0_PICO functions. |
| 22 | PA26/A1/GPAMP_IN+/COMP0_IN0+ | bidirectional | General-purpose digital I/O, ADC0 analog input 1, GPAMP non-inverting input, Comparator 0 non-inverting input, configurable for TIMG1_C0, UART0_RX, or SPI0_POCI functions. |
| 23 | VCORE | power_out | Regulated core power supply output (1.35 V nominal) requiring 470 nF decoupling capacitor with no external load. |
| 24 | PA0 | bidirectional | 5-V tolerant open-drain I/O with wakeup from SHUTDOWN, configurable as UART1_TX, I2C0_SDA, TIMG1_C0, or SPI0_CS1 (default BSL I2C_SDA). |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
MSPM0L1306SRGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
mspm0l1306srger-etched.step/mspm0l1306srger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mspm0l1306srger.step/mspm0l1306srger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (85 pp, sha256
d1eb766306fc0429, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).