component
MSPM0G1106TRGZR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "mspm0g1106trgzr",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"mspm0g1106trgzr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
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"files": [
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"mspm0g1106trgzr.kicad_mod",
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"mspm0g1106trgzr.step",
"mspm0g1106trgzr.lbr",
"docs/hero.png",
"docs/mspm0g1106trgzr-datasheet.pdf",
"viewers/symbol.html",
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"mspm0g1106trgzr-hero.overlay.json"
],
"component": {
"mpn": "MSPM0G1106TRGZR",
"manufacturer": "Texas Instruments",
"package": "VQFN-48(7x7)",
"pin_count": 49,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590916608279986176",
"parts": {
"symbol": "mspm0g1106trgzr.kicad_sym",
"footprint": "mspm0g1106trgzr.kicad_mod",
"model_3d": "mspm0g1106trgzr-hero.glb",
"model_3d_plain": "mspm0g1106trgzr.glb",
"model_3d_step": "mspm0g1106trgzr-etched.step",
"model_3d_step_plain": "mspm0g1106trgzr.step",
"lbr": "mspm0g1106trgzr.lbr"
},
"distributor_links": {
"lcsc": "C22362629",
"digikey": "296-MSPM0G1106TRGZRTR-ND",
"mouser": "595-MSPM0G1106TRGZR"
},
"distributor_check": {
"checked_at": "2026-10-12T12:18:10Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-MSPM0G1106TRGZRTR-ND",
"status": "found"
},
"mouser": {
"pn": "595-MSPM0G1106TRGZR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PA0",
"type": "bidirectional",
"description": "5 V tolerant open-drain I/O (ODIO) with alternate functions including UART0_TX, I2C0_SDA and FCC_IN; output-high needs an external pull-up because ODIO has no PMOS driver."
},
{
"number": "2",
"name": "PA1",
"type": "bidirectional",
"description": "5 V tolerant open-drain I/O (ODIO) with alternate functions including UART0_RX and I2C0_SCL; output-high needs an external pull-up because ODIO has no PMOS driver."
},
{
"number": "3",
"name": "PA28",
"type": "bidirectional",
"description": "High-drive I/O (HDIO) that can wake the device from SHUTDOWN; the datasheet gives an absolute maximum HDIO pin current of 20 mA."
},
{
"number": "4",
"name": "NRST",
"type": "input",
"description": "Active-low reset input that must be pulled up to VDD, otherwise the device cannot start; the datasheet suggests a 47 kΩ pull-up with 10 nF to ground."
},
{
"number": "5",
"name": "PA31",
"type": "bidirectional",
"description": "High-drive I/O (HDIO) that can wake the device from SHUTDOWN; alternate function includes CLK_OUT and UART0_RX."
},
{
"number": "6",
"name": "VDD",
"type": "power_in",
"description": "Power supply, 1.62 V to 3.6 V recommended operating range (absolute maximum -0.3 V to 4.1 V); decouple with 10 µF and 0.1 µF low-ESR capacitors placed within a few millimetres of the pin."
},
{
"number": "7",
"name": "VSS",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "8",
"name": "PA2/ROSC",
"type": "bidirectional",
"description": "Standard digital I/O; when the SYSOSC frequency correction loop is used, this pin connects to a 100 kΩ ±0.1% ±25 ppm ROSC resistor to VSS, and if the FCL is not used it can be a GPIO."
},
{
"number": "9",
"name": "PA3",
"type": "bidirectional",
"description": "Standard digital I/O; also the LFXT 32.768 kHz crystal oscillator input."
},
{
"number": "10",
"name": "PA4",
"type": "bidirectional",
"description": "Standard digital I/O; also the LFXT 32.768 kHz crystal oscillator output and LFCLK_IN digital clock input alternate."
},
{
"number": "11",
"name": "PA5",
"type": "bidirectional",
"description": "Standard digital I/O; also the HFXT crystal oscillator input, which supports 4 MHz to 48 MHz crystals."
},
{
"number": "12",
"name": "PA6",
"type": "bidirectional",
"description": "Standard digital I/O; also the HFXT crystal oscillator output and HFCLK_IN digital clock input alternate (HFCLK_IN accepts 4 MHz to 48 MHz logic-level clocks)."
},
{
"number": "13",
"name": "PA7",
"type": "bidirectional",
"description": "Standard digital I/O; configurable clock output (CLK_OUT) and timer alternate functions."
},
{
"number": "14",
"name": "PB2",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART3_TX, UART2_CTS and I2C1_SCL."
},
{
"number": "15",
"name": "PB3",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART3_RX, UART2_RTS and I2C1_SDA."
},
{
"number": "16",
"name": "PA8",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART1_TX and SPI0_CS0."
},
{
"number": "17",
"name": "PA9",
"type": "bidirectional",
"description": "High-speed I/O (HSIO); alternate functions include RTC_OUT, CLK_OUT, UART1_RX and SPI0_PICO. HSIO output frequency is up to 16 MHz to 40 MHz depending on VDD and DRV setting."
},
{
"number": "18",
"name": "PA10",
"type": "bidirectional",
"description": "High-drive I/O (HDIO); alternate functions include UART0_TX, SPI0_POCI and I2C0_SDA."
},
{
"number": "19",
"name": "PA11",
"type": "bidirectional",
"description": "High-drive I/O (HDIO) that can wake the device from SHUTDOWN; alternate functions include UART0_RX, SPI0_SCK and I2C0_SCL."
},
{
"number": "20",
"name": "PB6",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART1_TX and SPI1_CS0."
},
{
"number": "21",
"name": "PB7",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART1_RX and SPI1_POCI."
},
{
"number": "22",
"name": "PB8",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART1_CTS and SPI1_PICO."
},
{
"number": "23",
"name": "PB9",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART1_RTS and SPI1_SCK."
},
{
"number": "24",
"name": "PB14",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include SPI1_CS3 and SPI1_POCI."
},
{
"number": "25",
"name": "PB15",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART2_TX and SPI1_PICO."
},
{
"number": "26",
"name": "PB16",
"type": "bidirectional",
"description": "Standard digital I/O; alternate functions include UART2_RX and SPI1_SCK."
},
{
"number": "27",
"name": "PA12",
"type": "bidirectional",
"description": "High-speed I/O (HSIO); alternate functions include UART3_CTS, SPI0_SCK and FCC_IN."
},
{
"number": "28",
"name": "PA13",
"type": "bidirectional",
"description": "High-speed I/O (HSIO); alternate functions include UART3_RTS, SPI0_POCI and UART3_RX."
},
{
"number": "29",
"name": "PA14",
"type": "bidirectional",
"description": "High-speed I/O (HSIO); also ADC0 analog input channel 12 (A0_12) and CLK_OUT."
},
{
"number": "30",
"name": "PA15",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC1 analog input channel 0 (A1_0)."
},
{
"number": "31",
"name": "PA16",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC1 analog input channel 1 (A1_1) and FCC_IN."
},
{
"number": "32",
"name": "PA17",
"type": "bidirectional",
"description": "Standard digital I/O with wake-up from SHUTDOWN; also ADC1 analog input channel 2 (A1_2)."
},
{
"number": "33",
"name": "PA18",
"type": "bidirectional",
"description": "Standard digital I/O with wake-up from SHUTDOWN; also ADC1 analog input 3 (A1_3) and the GPAMP inverting input (GPAMP_IN-)."
},
{
"number": "34",
"name": "PA19",
"type": "bidirectional",
"description": "High-speed I/O (HSIO) used as the bidirectional serial wire debug data pin (SWDIO)."
},
{
"number": "35",
"name": "PA20",
"type": "input",
"description": "Standard digital I/O used as the serial wire debug clock input (SWCLK) from the debug probe."
},
{
"number": "36",
"name": "PB17",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC1 analog input channel 4 (A1_4)."
},
{
"number": "37",
"name": "PB18",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC1 analog input channel 5 (A1_5)."
},
{
"number": "38",
"name": "PB19",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC1 analog input channel 6 (A1_6)."
},
{
"number": "39",
"name": "PA21",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC1 analog input channel 7 (A1_7) and the VREF- ground-side reference pin for an external or internal voltage reference."
},
{
"number": "40",
"name": "PA22",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 7 (A0_7) and the GPAMP output."
},
{
"number": "41",
"name": "PB20",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 6 (A0_6)."
},
{
"number": "42",
"name": "PB24",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 5 (A0_5)."
},
{
"number": "43",
"name": "PA23",
"type": "bidirectional",
"description": "Standard digital I/O; also the VREF+ voltage reference pin, used as an external reference input or internal reference output, which requires a decoupling capacitor between VREF+ and VREF-/GND."
},
{
"number": "44",
"name": "PA24",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 3 (A0_3)."
},
{
"number": "45",
"name": "PA25",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 2 (A0_2)."
},
{
"number": "46",
"name": "PA26",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 1 (A0_1) and the GPAMP non-inverting input (GPAMP_IN+)."
},
{
"number": "47",
"name": "PA27",
"type": "bidirectional",
"description": "Standard digital I/O; also ADC0 analog input channel 0 (A0_0) and RTC_OUT."
},
{
"number": "48",
"name": "VCORE",
"type": "power_out",
"description": "Regulated core power output that requires a 0.47 µF (470 nF) capacitor placed close to the device; no external voltage or load may be applied to this pin."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The 48-pin VQFN (RGZ) pin numbers and names were taken from Table 6-1 (48 LQFP/VQFN column) and cros; The VQFN-48 package has an exposed thermal pad (Pad, power type in Table 6-3). It has no pin number ; Pin numbers PB0, PB1, PB4, PB5, PB10-PB13, PB21-PB23, PB25-PB27, PA29 and PA30 are not bonded out in",
"exposed pad 49 added from the footprint"
],
"pages_sent": 60,
"cost_usd": 0.3472,
"at": "2026-10-12T12:17:53"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590916608279986176",
"pages": 91,
"sha256": "2cddc09fb7f556fb",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "mspm0g1106trgzr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-12",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "mspm0g1106trgzr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3b58036daf81c4ec3b76812b35c91946278215d6be7e415df3c6a9554b40cb1a",
"checked": "2026-10-12",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}