MSP430FR2675TRHBR

{
  "slug": "msp430fr2675trhbr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "msp430fr2675trhbr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "msp430fr2675trhbr.kicad_sym",
    "msp430fr2675trhbr.kicad_mod",
    "msp430fr2675trhbr.glb",
    "msp430fr2675trhbr.step",
    "msp430fr2675trhbr.lbr",
    "docs/hero.png",
    "docs/msp430fr2675trhbr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "msp430fr2675trhbr-hero.glb",
    "msp430fr2675trhbr-hero.overlay.json"
  ],
  "component": {
    "mpn": "MSP430FR2675TRHBR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-32-EP(5x5)",
    "pin_count": 33,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/msp430fr2676",
    "parts": {
      "symbol": "msp430fr2675trhbr.kicad_sym",
      "footprint": "msp430fr2675trhbr.kicad_mod",
      "model_3d": "msp430fr2675trhbr-hero.glb",
      "model_3d_plain": "msp430fr2675trhbr.glb",
      "model_3d_step": "msp430fr2675trhbr-etched.step",
      "model_3d_step_plain": "msp430fr2675trhbr.step",
      "lbr": "msp430fr2675trhbr.lbr"
    },
    "distributor_links": {
      "lcsc": "C1339239",
      "digikey": "296-MSP430FR2675TRHBRTR-ND",
      "mouser": "595-SP430FR2675TRHBR"
    },
    "distributor_check": {
      "checked_at": "2026-10-10T23:51:57Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-MSP430FR2675TRHBRTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-SP430FR2675TRHBR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "RST/NMI/SBWTDIO",
        "type": "bidirectional",
        "description": "Multiplexed reset (RST, input, pullup enabled after BOR), NMI input and Spy-Bi-Wire data I/O; for an unused pin, use a 47-kΩ pullup or the internal pullup with a 10-nF (or 1.1-nF) pulldown."
      },
      {
        "number": "2",
        "name": "TEST/SBWTCK",
        "type": "input",
        "description": "Test-mode input that carries the Spy-Bi-Wire clock (SBWTCK); it always has an internal pulldown enabled, and it can be left open when unused."
      },
      {
        "number": "3",
        "name": "P1.4/UCA0TXD/UCA0SIMO/TA1.2/TCK/A4/VREF+",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.4 (high-impedance with Schmitt trigger after BOR) that is also eUSCI_A0 UART TXD or SPI SIMO, Timer TA1.2, JTAG TCK, ADC input A4 and VREF+ output."
      },
      {
        "number": "4",
        "name": "P1.5/UCA0RXD/UCA0SOMI/TA1.1/TMS/A5",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.5 (high-impedance after BOR) that is also eUSCI_A0 UART RXD or SPI SOMI, Timer TA1.1, JTAG TMS and ADC input A5."
      },
      {
        "number": "5",
        "name": "P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.6 (high-impedance after BOR) that is also eUSCI_A0 clock, Timer TA1CLK input, JTAG TDI/TCLK and ADC input A6."
      },
      {
        "number": "6",
        "name": "P1.7/UCA0STE/SMCLK/TDO/A7",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.7 (high-impedance after BOR) that is also eUSCI_A0 STE, SMCLK output, JTAG TDO and ADC input A7."
      },
      {
        "number": "7",
        "name": "P1.0/UCB0STE/TA0CLK/A0/Veref+",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.0 that is also eUSCI_B0 STE, Timer TA0CLK input, ADC input A0 and ADC positive reference Veref+."
      },
      {
        "number": "8",
        "name": "P1.1/UCB0CLK/TA0.1/COMP0.0/A1",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.1 that is also eUSCI_B0 clock, Timer TA0.1, eCOMP0 input channel COMP0.0 and ADC input A1."
      },
      {
        "number": "9",
        "name": "P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/Veref-",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.2 that is also eUSCI_B0 SIMO or SDA, Timer TA0.2, ADC input A2 and ADC negative reference Veref-."
      },
      {
        "number": "10",
        "name": "P1.3/UCB0SOMI/UCB0SCL/MCLK/A3",
        "type": "bidirectional",
        "description": "General-purpose I/O P1.3 that is also eUSCI_B0 SOMI or SCL, MCLK output and ADC input A3."
      },
      {
        "number": "11",
        "name": "P2.2/SYNC/ACLK/COMP0.1",
        "type": "bidirectional",
        "description": "General-purpose I/O P2.2 that is also CapTIvate synchronous trigger input SYNC, ACLK output and eCOMP0 input channel COMP0.1."
      },
      {
        "number": "12",
        "name": "P3.0/TA2.2/CAP0.0",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.0 that is also Timer TA2.2 and CapTIvate channel CAP0.0."
      },
      {
        "number": "13",
        "name": "P3.3/TA2.1/CAP0.1",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.3 that is also Timer TA2.1 and CapTIvate channel CAP0.1."
      },
      {
        "number": "14",
        "name": "P2.3/TA2.0/CAP0.2",
        "type": "bidirectional",
        "description": "General-purpose I/O P2.3 that is also Timer TA2.0 and CapTIvate channel CAP0.2."
      },
      {
        "number": "15",
        "name": "P3.4/TA2CLK/COMP0OUT/CAP0.3",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.4 that is also Timer TA2CLK input, eCOMP0 output COMP0OUT and CapTIvate channel CAP0.3."
      },
      {
        "number": "16",
        "name": "P3.1/UCA1STE/CAP1.0",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.1 that is also eUSCI_A1 STE and CapTIvate channel CAP1.0."
      },
      {
        "number": "17",
        "name": "P2.4/UCA1CLK/CAP1.1",
        "type": "bidirectional",
        "description": "General-purpose I/O P2.4 that is also eUSCI_A1 clock and CapTIvate channel CAP1.1."
      },
      {
        "number": "18",
        "name": "P2.5/UCA1RXD/UCA1SOMI/CAP1.2",
        "type": "bidirectional",
        "description": "General-purpose I/O P2.5 that is also eUSCI_A1 UART RXD or SPI SOMI and CapTIvate channel CAP1.2."
      },
      {
        "number": "19",
        "name": "P2.6/UCA1TXD/UCA1SIMO/CAP1.3",
        "type": "bidirectional",
        "description": "General-purpose I/O P2.6 that is also eUSCI_A1 UART TXD or SPI SIMO and CapTIvate channel CAP1.3."
      },
      {
        "number": "20",
        "name": "VREG",
        "type": "power_out",
        "description": "CapTIvate regulator output that requires a decoupling capacitor of 1 µF with ESR ≤ 200 mΩ."
      },
      {
        "number": "21",
        "name": "P3.7/TA3.2/CAP2.0",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.7 that is also Timer TA3.2 and CapTIvate channel CAP2.0."
      },
      {
        "number": "22",
        "name": "P4.0/TA3.1/CAP2.1",
        "type": "bidirectional",
        "description": "General-purpose I/O P4.0 that is also Timer TA3.1 and CapTIvate channel CAP2.1."
      },
      {
        "number": "23",
        "name": "P4.1/TA3.0/CAP2.2",
        "type": "bidirectional",
        "description": "General-purpose I/O P4.1 that is also Timer TA3.0 and CapTIvate channel CAP2.2."
      },
      {
        "number": "24",
        "name": "P4.2/TA3CLK/CAP2.3",
        "type": "bidirectional",
        "description": "General-purpose I/O P4.2 that is also Timer TA3CLK input and CapTIvate channel CAP2.3."
      },
      {
        "number": "25",
        "name": "P2.7/UCB1STE/CAP3.0",
        "type": "bidirectional",
        "description": "General-purpose I/O P2.7 that is also eUSCI_B1 STE and CapTIvate channel CAP3.0."
      },
      {
        "number": "26",
        "name": "P3.5/UCB1CLK/TB0TRG/CAP3.1",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.5 that is also eUSCI_B1 clock, Timer TB0 external trigger TB0TRG (for TB0OUTH high-impedance) and CapTIvate channel CAP3.1."
      },
      {
        "number": "27",
        "name": "P3.2/UCB1SIMO/UCB1SDA/CAP3.2",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.2 that is also eUSCI_B1 SIMO or SDA and CapTIvate channel CAP3.2."
      },
      {
        "number": "28",
        "name": "P3.6/UCB1SOMI/UCB1SCL/CAP3.3",
        "type": "bidirectional",
        "description": "General-purpose I/O P3.6 that is also eUSCI_B1 SOMI or SCL and CapTIvate channel CAP3.3."
      },
      {
        "number": "29",
        "name": "P2.0/XOUT",
        "type": "output",
        "description": "Output terminal of the 32-kHz crystal oscillator (XOUT), which can be used for other purposes when a digital clock is applied to XIN in XT1BYPASS mode."
      },
      {
        "number": "30",
        "name": "P2.1/XIN",
        "type": "input",
        "description": "Input terminal of the low-frequency (32-kHz) crystal oscillator (XIN), which also accepts a digital clock in XT1BYPASS mode."
      },
      {
        "number": "31",
        "name": "DVSS",
        "type": "power_in",
        "description": "Ground reference for the digital and analog modules, to be connected to the system ground."
      },
      {
        "number": "32",
        "name": "DVCC",
        "type": "power_in",
        "description": "Main supply input for the digital and analog modules, with a recommended supply of 1.8 V to 3.6 V in CapTIvate VREG charge mode and a recommended 4.7-µF to 10-µF capacitor."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 7-1 rows for these RHB pins are on pages 14-15, which are not in the provided text. RHB number; VREG is listed on the RHB figure 7-3 between P2.6 and P3.7 but does not appear in the visible tables; The VQFN exposed thermal pad has no numbered pin; it is listed in Table 7-2 as 'PAD' for RHB and is ",
          "exposed pad 33 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 52,
        "cost_usd": 0.29,
        "at": "2026-10-10T23:51:41"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/msp430fr2676",
        "pages": 129,
        "sha256": "98b202cd0699eba3",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "msp430fr2675trhbr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "msp430fr2675trhbr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3d84975de6bad1e05a3e4150f767630929c27710362a6a5f96a31cd62a467503",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}