component
MSP430FR2512IPW16R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "msp430fr2512ipw16r",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"msp430fr2512ipw16r",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"msp430fr2512ipw16r.kicad_sym",
"msp430fr2512ipw16r.kicad_mod",
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"msp430fr2512ipw16r.step",
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"docs/msp430fr2512ipw16r-datasheet.pdf",
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"viewers/footprint.html",
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"msp430fr2512ipw16r-hero.overlay.json"
],
"component": {
"mpn": "MSP430FR2512IPW16R",
"manufacturer": "Texas Instruments",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com/cn/lit/ds/symlink/msp430fr2512.pdf",
"parts": {
"symbol": "msp430fr2512ipw16r.kicad_sym",
"footprint": "msp430fr2512ipw16r.kicad_mod",
"model_3d": "msp430fr2512ipw16r-hero.glb",
"model_3d_plain": "msp430fr2512ipw16r.glb",
"model_3d_step": "msp430fr2512ipw16r-etched.step",
"model_3d_step_plain": "msp430fr2512ipw16r.step",
"lbr": "msp430fr2512ipw16r.lbr"
},
"distributor_links": {
"lcsc": "C191433",
"digikey": "296-51449-2-ND",
"mouser": "595-430FR2512IPW16R"
},
"distributor_check": {
"checked_at": "2026-10-10T19:44:03Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-51449-2-ND",
"status": "found"
},
"mouser": {
"pn": "595-430FR2512IPW16R",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "P1.1/UCB0CLK/ACLK/A1/VREF+",
"type": "bidirectional",
"description": "General-purpose I/O P1.1 that is switched to OFF (high-impedance with Schmitt trigger and pullup/pulldown disabled) after BOR; alternate functions are UCB0CLK, ACLK, analog input A1 and VREF+ reference input (CAP1.1 exists only on MSP430FR2522)."
},
{
"number": "2",
"name": "P1.0/UCB0STE/A0/Veref+",
"type": "bidirectional",
"description": "General-purpose I/O P1.0 that is switched to OFF after BOR; alternate functions are UCB0STE, analog input A0 and Veref+ ADC positive reference input (CAP1.0 exists only on MSP430FR2522)."
},
{
"number": "3",
"name": "TEST/SBWTCK",
"type": "input",
"description": "Test mode pin that always has an internal pull-down enabled and doubles as the Spy-Bi-Wire input clock SBWTCK; leave open when unused."
},
{
"number": "4",
"name": "RST/NMI/SBWTDIO",
"type": "bidirectional",
"description": "Device reset RST (internal pullup selectable), NMI input, and Spy-Bi-Wire data SBWTDIO; when unused, use a 47-kΩ pullup or internal pullup with a 10-nF (or 1.1-nF) pulldown."
},
{
"number": "5",
"name": "DVCC",
"type": "power_in",
"description": "Main supply for the digital and analog modules, specified at 1.8 V to 3.6 V and decoupled with 4.7 µF to 10 µF."
},
{
"number": "6",
"name": "DVSS",
"type": "power_in",
"description": "Ground reference (0 V) for the DVCC supply and the digital and analog modules."
},
{
"number": "7",
"name": "P2.1/UCA0RXD/UCA0SOMI/XIN",
"type": "bidirectional",
"description": "General-purpose I/O P2.1 that is switched to OFF after BOR; alternate functions are UCA0RXD, UCA0SOMI and XIN, the input of the 32-kHz low-frequency crystal oscillator."
},
{
"number": "8",
"name": "P2.0/UCA0TXD/UCA0SIMO/XOUT",
"type": "bidirectional",
"description": "General-purpose I/O P2.0 that is switched to OFF after BOR; alternate functions are UCA0TXD, UCA0SIMO and XOUT, the output of the 32-kHz low-frequency crystal oscillator."
},
{
"number": "9",
"name": "P2.2/TA1.1/SYNC/A4",
"type": "bidirectional",
"description": "General-purpose I/O P2.2 that is switched to OFF after BOR; alternate functions are Timer TA1.1, SYNC (CapTIvate synchronous trigger input) and analog input A4."
},
{
"number": "10",
"name": "P1.7/UCA0STE/TDO/CAP0.3",
"type": "bidirectional",
"description": "General-purpose I/O P1.7 that is switched to OFF after BOR; alternate functions are UCA0STE, JTAG TDO test data output and CapTIvate channel CAP0.3."
},
{
"number": "11",
"name": "P1.6/UCA0CLK/TA0CLK/TDI/TCLK/CAP0.2",
"type": "bidirectional",
"description": "General-purpose I/O P1.6 that is switched to OFF after BOR; alternate functions are UCA0CLK, TA0CLK timer clock input, JTAG TDI/TCLK test data input and clock, and CapTIvate channel CAP0.2."
},
{
"number": "12",
"name": "P1.5/UCA0RXD/UCA0SOMI/TA0.2/TMS/CAP0.1",
"type": "bidirectional",
"description": "General-purpose I/O P1.5 that is switched to OFF after BOR; alternate functions are UCA0RXD, UCA0SOMI, Timer TA0.2, JTAG TMS test mode select and CapTIvate channel CAP0.1."
},
{
"number": "13",
"name": "P1.4/UCA0TXD/UCA0SIMO/TA0.1/TCK/CAP0.0",
"type": "bidirectional",
"description": "General-purpose I/O P1.4 that is switched to OFF after BOR; alternate functions are UCA0TXD, UCA0SIMO, Timer TA0.1, JTAG TCK test clock and CapTIvate channel CAP0.0."
},
{
"number": "14",
"name": "VREG",
"type": "power_out",
"description": "Decoupling pin for the internal CapTIvate regulator, which requires a recommended 1-µF capacitor with ESR ≤ 200 mΩ."
},
{
"number": "15",
"name": "P1.3/UCB0SOMI/UCB0SCL/MCLK/A3",
"type": "bidirectional",
"description": "General-purpose I/O P1.3 that is switched to OFF after BOR; alternate functions are UCB0SOMI/UCB0SCL, MCLK output and analog input A3 (CAP1.3 exists only on MSP430FR2522)."
},
{
"number": "16",
"name": "P1.2/UCB0SIMO/UCB0SDA/SMCLK/A2/Veref-",
"type": "bidirectional",
"description": "General-purpose I/O P1.2 that is switched to OFF after BOR; alternate functions are UCB0SIMO/UCB0SDA, SMCLK output, analog input A2 and Veref- ADC negative reference input (CAP1.2 exists only on MSP430FR2522)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The PW pin list in the datasheet includes CAP1.x names, but the datasheet says CAP1.x is available o; Pin 4 combines RST/NMI (input) and SBWTDIO (I/O). I classified it as bidirectional because of SBWTDI; The datasheet lists VREG as a Power pin and describes it as the CapTIvate regulator decoupling pin. "
],
"pages_sent": 41,
"cost_usd": 0.198,
"at": "2026-10-10T19:43:47"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/ds/symlink/msp430fr2512.pdf",
"pages": 94,
"sha256": "bb8d4e10a575dcaf",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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},
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"seat": "z = 0",
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6.4,
5.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
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"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "msp430fr2512ipw16r-etched.step",
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"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"footprint_binding": "identity",
"sha256": "0841a8dc74f0b8953b6d2a00c0b98d5cca25bfc30db67ed5372a112c72c3ea87",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}