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MSP430FR2512IPW16R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR2512IPW16R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-16
MSP430FR2512IPW16R from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.1/UCB0CLK/ACLK/A1/VREF+ | bidirectional | General-purpose I/O P1.1 that is switched to OFF (high-impedance with Schmitt trigger and pullup/pulldown disabled) after BOR; alternate functions are UCB0CLK, ACLK, analog input A1 and VREF+ reference input (CAP1.1 exists only on MSP430FR2522). |
| 2 | P1.0/UCB0STE/A0/Veref+ | bidirectional | General-purpose I/O P1.0 that is switched to OFF after BOR; alternate functions are UCB0STE, analog input A0 and Veref+ ADC positive reference input (CAP1.0 exists only on MSP430FR2522). |
| 3 | TEST/SBWTCK | input | Test mode pin that always has an internal pull-down enabled and doubles as the Spy-Bi-Wire input clock SBWTCK; leave open when unused. |
| 4 | RST/NMI/SBWTDIO | bidirectional | Device reset RST (internal pullup selectable), NMI input, and Spy-Bi-Wire data SBWTDIO; when unused, use a 47-kΩ pullup or internal pullup with a 10-nF (or 1.1-nF) pulldown. |
| 5 | DVCC | power_in | Main supply for the digital and analog modules, specified at 1.8 V to 3.6 V and decoupled with 4.7 µF to 10 µF. |
| 6 | DVSS | power_in | Ground reference (0 V) for the DVCC supply and the digital and analog modules. |
| 7 | P2.1/UCA0RXD/UCA0SOMI/XIN | bidirectional | General-purpose I/O P2.1 that is switched to OFF after BOR; alternate functions are UCA0RXD, UCA0SOMI and XIN, the input of the 32-kHz low-frequency crystal oscillator. |
| 8 | P2.0/UCA0TXD/UCA0SIMO/XOUT | bidirectional | General-purpose I/O P2.0 that is switched to OFF after BOR; alternate functions are UCA0TXD, UCA0SIMO and XOUT, the output of the 32-kHz low-frequency crystal oscillator. |
| 9 | P2.2/TA1.1/SYNC/A4 | bidirectional | General-purpose I/O P2.2 that is switched to OFF after BOR; alternate functions are Timer TA1.1, SYNC (CapTIvate synchronous trigger input) and analog input A4. |
| 10 | P1.7/UCA0STE/TDO/CAP0.3 | bidirectional | General-purpose I/O P1.7 that is switched to OFF after BOR; alternate functions are UCA0STE, JTAG TDO test data output and CapTIvate channel CAP0.3. |
| 11 | P1.6/UCA0CLK/TA0CLK/TDI/TCLK/CAP0.2 | bidirectional | General-purpose I/O P1.6 that is switched to OFF after BOR; alternate functions are UCA0CLK, TA0CLK timer clock input, JTAG TDI/TCLK test data input and clock, and CapTIvate channel CAP0.2. |
| 12 | P1.5/UCA0RXD/UCA0SOMI/TA0.2/TMS/CAP0.1 | bidirectional | General-purpose I/O P1.5 that is switched to OFF after BOR; alternate functions are UCA0RXD, UCA0SOMI, Timer TA0.2, JTAG TMS test mode select and CapTIvate channel CAP0.1. |
| 13 | P1.4/UCA0TXD/UCA0SIMO/TA0.1/TCK/CAP0.0 | bidirectional | General-purpose I/O P1.4 that is switched to OFF after BOR; alternate functions are UCA0TXD, UCA0SIMO, Timer TA0.1, JTAG TCK test clock and CapTIvate channel CAP0.0. |
| 14 | VREG | power_out | Decoupling pin for the internal CapTIvate regulator, which requires a recommended 1-µF capacitor with ESR ≤ 200 mΩ. |
| 15 | P1.3/UCB0SOMI/UCB0SCL/MCLK/A3 | bidirectional | General-purpose I/O P1.3 that is switched to OFF after BOR; alternate functions are UCB0SOMI/UCB0SCL, MCLK output and analog input A3 (CAP1.3 exists only on MSP430FR2522). |
| 16 | P1.2/UCB0SIMO/UCB0SDA/SMCLK/A2/Veref- | bidirectional | General-purpose I/O P1.2 that is switched to OFF after BOR; alternate functions are UCB0SIMO/UCB0SDA, SMCLK output, analog input A2 and Veref- ADC negative reference input (CAP1.2 exists only on MSP430FR2522). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
MSP430FR2512IPW16R - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
msp430fr2512ipw16r-etched.step/msp430fr2512ipw16r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr2512ipw16r.step/msp430fr2512ipw16r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (94 pp, sha256
bb8d4e10a575dcaf, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).