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MSP430FR2355TPT
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MSP430FR2355TPT
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
MSP430FR2355TPT from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.2 | bidirectional | General-purpose I/O P1.2 (reset default, reset state OFF) multiplexed with UCB0SIMO/UCB0SDA, TB0TRG, OA0- (MSP430FR235x only), A2 and Veref-, LVCMOS buffer powered from DVCC. |
| 2 | P1.1 | bidirectional | General-purpose I/O P1.1 (reset default, reset state OFF) multiplexed with UCB0CLK, ACLK, OA0O (MSP430FR235x only), COMP0.1 and A1, LVCMOS buffer powered from DVCC. |
| 3 | P1.0 | bidirectional | General-purpose I/O P1.0 (reset default, reset state OFF) multiplexed with UCB0STE, SMCLK, COMP0.0, A0 and Veref+, LVCMOS buffer powered from DVCC. |
| 4 | TEST/SBWTCK | input | TEST pin for JTAG/test mode that always has an internal pulldown enabled and is left open if unused; it is multiplexed as the Spy-Bi-Wire clock SBWTCK. |
| 5 | RST/NMI/SBWTDIO | bidirectional | Reset (RST, reset default) or nonmaskable interrupt (NMI) pin, also used for Spy-Bi-Wire data SBWTDIO; if unused, use a 47-kΩ pullup to DVCC or the internal pullup with a 10-nF (or 1.1-nF) pulldown. |
| 6 | DVCC | power_in | Primary power supply pin for the digital and analog modules; VCC range is 1.8 V to 3.6 V with a recommended 4.7 µF to 10 µF capacitor at DVCC and 0.1 µF decoupling placed within a few millimeters of the pin. |
| 7 | DVSS | power_in | Ground supply pin (VSS, 0 V) for the digital and analog modules; all voltages are referenced to VSS. |
| 8 | P2.7/TB0CLK/XIN | bidirectional | General-purpose I/O P2.7 (reset default) multiplexed with the TB0CLK timer clock input and the XIN input terminal for the crystal oscillator; external bypass capacitors are required on the crystal pins. |
| 9 | P2.6/MCLK/XOUT | bidirectional | General-purpose I/O P2.6 (reset default) multiplexed with the MCLK output and the XOUT crystal oscillator output terminal. |
| 10 | P2.5/COMP1.0 | bidirectional | General-purpose I/O P2.5 (reset default) multiplexed with eCOMP1 comparator input channel COMP1.0. |
| 11 | P2.4/COMP1.1 | bidirectional | General-purpose I/O P2.4 (reset default) multiplexed with eCOMP1 comparator input channel COMP1.1. |
| 12 | P4.7/UCB1SOMI/UCB1SCL | bidirectional | General-purpose I/O P4.7 (reset default) multiplexed with eUSCI_B1 SPI slave-out (SOMI) or I2C clock (SCL). |
| 13 | P4.6/UCB1SIMO/UCB1SDA | bidirectional | General-purpose I/O P4.6 (reset default) multiplexed with eUSCI_B1 SPI slave-in (SIMO) or I2C data (SDA). |
| 14 | P4.5/UCB1CLK | bidirectional | General-purpose I/O P4.5 (reset default) multiplexed with the eUSCI_B1 clock UCB1CLK. |
| 15 | P4.4/UCB1STE | bidirectional | General-purpose I/O P4.4 (reset default) multiplexed with the eUSCI_B1 STE signal UCB1STE. |
| 16 | P6.6/TB3CLK | bidirectional | General-purpose I/O P6.6 (reset default) multiplexed with the Timer_B3 clock input TB3CLK. |
| 17 | P6.5/TB3.6 | bidirectional | General-purpose I/O P6.5 (reset default) multiplexed with Timer TB3 CCR6 capture/compare output TB3.6. |
| 18 | P6.4/TB3.5 | bidirectional | General-purpose I/O P6.4 (reset default) multiplexed with Timer TB3 CCR5 capture/compare output TB3.5. |
| 19 | P6.3/TB3.4 | bidirectional | General-purpose I/O P6.3 (reset default) multiplexed with Timer TB3 CCR4 capture/compare output TB3.4. |
| 20 | P6.2/TB3.3 | bidirectional | General-purpose I/O P6.2 (reset default) multiplexed with Timer TB3 CCR3 capture/compare output TB3.3. |
| 21 | P6.1/TB3.2 | bidirectional | General-purpose I/O P6.1 (reset default) multiplexed with Timer TB3 CCR2 capture/compare output TB3.2. |
| 22 | P6.0/TB3.1 | bidirectional | General-purpose I/O P6.0 (reset default) multiplexed with Timer TB3 CCR1 capture/compare output TB3.1. |
| 23 | P4.3/UCA1TXD/UCA1SIMO | bidirectional | General-purpose I/O P4.3 (reset default) multiplexed with eUSCI_A1 UART transmit (TXD) or SPI SIMO. |
| 24 | P4.2/UCA1RXD/UCA1SOMI | bidirectional | General-purpose I/O P4.2 (reset default) multiplexed with eUSCI_A1 UART receive (RXD) or SPI SOMI. |
| 25 | P4.1/UCA1CLK | bidirectional | General-purpose I/O P4.1 (reset default) multiplexed with the eUSCI_A1 clock UCA1CLK. |
| 26 | P4.0/UCA1STE/ISOTXD/ISORXD | bidirectional | General-purpose I/O P4.0 (reset default) multiplexed with eUSCI_A1 STE, ISOTXD and ISORXD. |
| 27 | P2.3/TB1TRG | bidirectional | General-purpose I/O P2.3 (reset default) multiplexed with the TB1 external trigger input TB1TRG. |
| 28 | P2.2/TB1CLK | bidirectional | General-purpose I/O P2.2 (reset default) multiplexed with the Timer TB1 clock input TB1CLK. |
| 29 | P2.1/TB1.2/COMP1.O | bidirectional | General-purpose I/O P2.1 (reset default) multiplexed with Timer TB1 CCR2 output TB1.2 and eCOMP1 comparator output COMP1.O. |
| 30 | P2.0/TB1.1/COMP0.O | bidirectional | General-purpose I/O P2.0 multiplexed with Timer TB1 CCR1 output TB1.1 and eCOMP0 comparator output COMP0.O. |
| 31 | P1.7/UCA0TXD/UCA0SIMO/TB0.2/TDO/OA1+/A7/VREF+ | bidirectional | General-purpose I/O P1.7 multiplexed with eUSCI_A0 TXD/SIMO, Timer TB0 CCR2 TB0.2, JTAG TDO, OA1+ (MSP430FR235x only), ADC input A7 and VREF+; the ADC input A7 can be used to measure the 1.2-V PMM reference when enabled. |
| 32 | P1.6/UCA0RXD/UCA0SOMI/TB0.1/TDI/TCLK/OA1-/A6 | bidirectional | General-purpose I/O P1.6 multiplexed with eUSCI_A0 RXD/SOMI, Timer TB0 CCR1 TB0.1, JTAG TDI/TCLK, OA1- (MSP430FR235x only) and ADC input A6. |
| 33 | P1.5/UCA0CLK/TMS/OA1O/A5 | bidirectional | General-purpose I/O P1.5 multiplexed with eUSCI_A0 clock UCA0CLK, JTAG TMS, OA1O (MSP430FR235x only) and ADC input A5. |
| 34 | P1.4/UCA0STE/TCK/A4 | bidirectional | General-purpose I/O P1.4 multiplexed with eUSCI_A0 STE, JTAG TCK and ADC input A4. |
| 35 | P3.7/OA3+ | bidirectional | General-purpose I/O P3.7 multiplexed with the non-inverting input OA3+ of SAC3 (MSP430FR235x only). |
| 36 | P3.6/OA3- | bidirectional | General-purpose I/O P3.6 multiplexed with the inverting input OA3- of SAC3 (MSP430FR235x only). |
| 37 | P3.5/OA3O | bidirectional | General-purpose I/O P3.5 multiplexed with the SAC3 operational amplifier output OA3O (MSP430FR235x only). |
| 38 | P3.4/SMCLK | bidirectional | General-purpose I/O P3.4 multiplexed with the SMCLK output. |
| 39 | P5.4 | bidirectional | General-purpose I/O P5.4 with no alternate function listed in the port P5 pin function table; LVCMOS buffer powered from DVCC. |
| 40 | P5.3/TB2TRG/A11 | bidirectional | General-purpose I/O P5.3 multiplexed with the Timer TB2 external trigger input TB2TRG and ADC input A11. |
| 41 | P5.2/TB2CLK/A10 | bidirectional | General-purpose I/O P5.2 multiplexed with the Timer TB2 clock input TB2CLK and ADC input A10. |
| 42 | P5.1/TB2.2/MFM.TX/A9 | bidirectional | General-purpose I/O P5.1 multiplexed with Timer TB2 CCR2 output TB2.2, Manchester module transmit MFM.TX and ADC input A9. |
| 43 | P5.0/TB2.1/MFM.RX/A8 | bidirectional | General-purpose I/O P5.0 multiplexed with Timer TB2 CCR1 output TB2.1, Manchester module receive MFM.RX and ADC input A8. |
| 44 | P3.3/OA2+ | bidirectional | General-purpose I/O P3.3 multiplexed with the non-inverting input OA2+ of SAC2 (MSP430FR235x only). |
| 45 | P3.2/OA2- | bidirectional | General-purpose I/O P3.2 multiplexed with the inverting input OA2- of SAC2 (MSP430FR235x only). |
| 46 | P3.1/OA2O | bidirectional | General-purpose I/O P3.1 multiplexed with the SAC2 operational amplifier output OA2O (MSP430FR235x only). |
| 47 | P3.0/MCLK | bidirectional | General-purpose I/O P3.0 multiplexed with the MCLK output. |
| 48 | P1.3/UCB0SOMI/UCB0SCL/OA0+/A3 | bidirectional | General-purpose I/O P1.3 multiplexed with eUSCI_B0 SPI SOMI or I2C SCL, OA0+ (MSP430FR235x only) and ADC input A3. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
MSP430FR2355TPT - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
msp430fr2355tpt-etched.step/msp430fr2355tpt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr2355tpt.step/msp430fr2355tpt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (152 pp, sha256
f1ebe8a259a8e556, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MSP430FR2355TPT
**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
MSP430FR2355TPT from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.2 | bidirectional | General-purpose I/O P1.2 (reset default, reset state OFF) multiplexed with UCB0SIMO/UCB0SDA, TB0TRG, OA0- (MSP430FR235x only), A2 and Veref-, LVCMOS buffer powered from DVCC. |
| 2 | P1.1 | bidirectional | General-purpose I/O P1.1 (reset default, reset state OFF) multiplexed with UCB0CLK, ACLK, OA0O (MSP430FR235x only), COMP0.1 and A1, LVCMOS buffer powered from DVCC. |
| 3 | P1.0 | bidirectional | General-purpose I/O P1.0 (reset default, reset state OFF) multiplexed with UCB0STE, SMCLK, COMP0.0, A0 and Veref+, LVCMOS buffer powered from DVCC. |
| 4 | TEST/SBWTCK | input | TEST pin for JTAG/test mode that always has an internal pulldown enabled and is left open if unused; it is multiplexed as the Spy-Bi-Wire clock SBWTCK. |
| 5 | RST/NMI/SBWTDIO | bidirectional | Reset (RST, reset default) or nonmaskable interrupt (NMI) pin, also used for Spy-Bi-Wire data SBWTDIO; if unused, use a 47-kΩ pullup to DVCC or the internal pullup with a 10-nF (or 1.1-nF) pulldown. |
| 6 | DVCC | power_in | Primary power supply pin for the digital and analog modules; VCC range is 1.8 V to 3.6 V with a recommended 4.7 µF to 10 µF capacitor at DVCC and 0.1 µF decoupling placed within a few millimeters of the pin. |
| 7 | DVSS | power_in | Ground supply pin (VSS, 0 V) for the digital and analog modules; all voltages are referenced to VSS. |
| 8 | P2.7/TB0CLK/XIN | bidirectional | General-purpose I/O P2.7 (reset default) multiplexed with the TB0CLK timer clock input and the XIN input terminal for the crystal oscillator; external bypass capacitors are required on the crystal pins. |
| 9 | P2.6/MCLK/XOUT | bidirectional | General-purpose I/O P2.6 (reset default) multiplexed with the MCLK output and the XOUT crystal oscillator output terminal. |
| 10 | P2.5/COMP1.0 | bidirectional | General-purpose I/O P2.5 (reset default) multiplexed with eCOMP1 comparator input channel COMP1.0. |
| 11 | P2.4/COMP1.1 | bidirectional | General-purpose I/O P2.4 (reset default) multiplexed with eCOMP1 comparator input channel COMP1.1. |
| 12 | P4.7/UCB1SOMI/UCB1SCL | bidirectional | General-purpose I/O P4.7 (reset default) multiplexed with eUSCI_B1 SPI slave-out (SOMI) or I2C clock (SCL). |
| 13 | P4.6/UCB1SIMO/UCB1SDA | bidirectional | General-purpose I/O P4.6 (reset default) multiplexed with eUSCI_B1 SPI slave-in (SIMO) or I2C data (SDA). |
| 14 | P4.5/UCB1CLK | bidirectional | General-purpose I/O P4.5 (reset default) multiplexed with the eUSCI_B1 clock UCB1CLK. |
| 15 | P4.4/UCB1STE | bidirectional | General-purpose I/O P4.4 (reset default) multiplexed with the eUSCI_B1 STE signal UCB1STE. |
| 16 | P6.6/TB3CLK | bidirectional | General-purpose I/O P6.6 (reset default) multiplexed with the Timer_B3 clock input TB3CLK. |
| 17 | P6.5/TB3.6 | bidirectional | General-purpose I/O P6.5 (reset default) multiplexed with Timer TB3 CCR6 capture/compare output TB3.6. |
| 18 | P6.4/TB3.5 | bidirectional | General-purpose I/O P6.4 (reset default) multiplexed with Timer TB3 CCR5 capture/compare output TB3.5. |
| 19 | P6.3/TB3.4 | bidirectional | General-purpose I/O P6.3 (reset default) multiplexed with Timer TB3 CCR4 capture/compare output TB3.4. |
| 20 | P6.2/TB3.3 | bidirectional | General-purpose I/O P6.2 (reset default) multiplexed with Timer TB3 CCR3 capture/compare output TB3.3. |
| 21 | P6.1/TB3.2 | bidirectional | General-purpose I/O P6.1 (reset default) multiplexed with Timer TB3 CCR2 capture/compare output TB3.2. |
| 22 | P6.0/TB3.1 | bidirectional | General-purpose I/O P6.0 (reset default) multiplexed with Timer TB3 CCR1 capture/compare output TB3.1. |
| 23 | P4.3/UCA1TXD/UCA1SIMO | bidirectional | General-purpose I/O P4.3 (reset default) multiplexed with eUSCI_A1 UART transmit (TXD) or SPI SIMO. |
| 24 | P4.2/UCA1RXD/UCA1SOMI | bidirectional | General-purpose I/O P4.2 (reset default) multiplexed with eUSCI_A1 UART receive (RXD) or SPI SOMI. |
| 25 | P4.1/UCA1CLK | bidirectional | General-purpose I/O P4.1 (reset default) multiplexed with the eUSCI_A1 clock UCA1CLK. |
| 26 | P4.0/UCA1STE/ISOTXD/ISORXD | bidirectional | General-purpose I/O P4.0 (reset default) multiplexed with eUSCI_A1 STE, ISOTXD and ISORXD. |
| 27 | P2.3/TB1TRG | bidirectional | General-purpose I/O P2.3 (reset default) multiplexed with the TB1 external trigger input TB1TRG. |
| 28 | P2.2/TB1CLK | bidirectional | General-purpose I/O P2.2 (reset default) multiplexed with the Timer TB1 clock input TB1CLK. |
| 29 | P2.1/TB1.2/COMP1.O | bidirectional | General-purpose I/O P2.1 (reset default) multiplexed with Timer TB1 CCR2 output TB1.2 and eCOMP1 comparator output COMP1.O. |
| 30 | P2.0/TB1.1/COMP0.O | bidirectional | General-purpose I/O P2.0 multiplexed with Timer TB1 CCR1 output TB1.1 and eCOMP0 comparator output COMP0.O. |
| 31 | P1.7/UCA0TXD/UCA0SIMO/TB0.2/TDO/OA1+/A7/VREF+ | bidirectional | General-purpose I/O P1.7 multiplexed with eUSCI_A0 TXD/SIMO, Timer TB0 CCR2 TB0.2, JTAG TDO, OA1+ (MSP430FR235x only), ADC input A7 and VREF+; the ADC input A7 can be used to measure the 1.2-V PMM reference when enabled. |
| 32 | P1.6/UCA0RXD/UCA0SOMI/TB0.1/TDI/TCLK/OA1-/A6 | bidirectional | General-purpose I/O P1.6 multiplexed with eUSCI_A0 RXD/SOMI, Timer TB0 CCR1 TB0.1, JTAG TDI/TCLK, OA1- (MSP430FR235x only) and ADC input A6. |
| 33 | P1.5/UCA0CLK/TMS/OA1O/A5 | bidirectional | General-purpose I/O P1.5 multiplexed with eUSCI_A0 clock UCA0CLK, JTAG TMS, OA1O (MSP430FR235x only) and ADC input A5. |
| 34 | P1.4/UCA0STE/TCK/A4 | bidirectional | General-purpose I/O P1.4 multiplexed with eUSCI_A0 STE, JTAG TCK and ADC input A4. |
| 35 | P3.7/OA3+ | bidirectional | General-purpose I/O P3.7 multiplexed with the non-inverting input OA3+ of SAC3 (MSP430FR235x only). |
| 36 | P3.6/OA3- | bidirectional | General-purpose I/O P3.6 multiplexed with the inverting input OA3- of SAC3 (MSP430FR235x only). |
| 37 | P3.5/OA3O | bidirectional | General-purpose I/O P3.5 multiplexed with the SAC3 operational amplifier output OA3O (MSP430FR235x only). |
| 38 | P3.4/SMCLK | bidirectional | General-purpose I/O P3.4 multiplexed with the SMCLK output. |
| 39 | P5.4 | bidirectional | General-purpose I/O P5.4 with no alternate function listed in the port P5 pin function table; LVCMOS buffer powered from DVCC. |
| 40 | P5.3/TB2TRG/A11 | bidirectional | General-purpose I/O P5.3 multiplexed with the Timer TB2 external trigger input TB2TRG and ADC input A11. |
| 41 | P5.2/TB2CLK/A10 | bidirectional | General-purpose I/O P5.2 multiplexed with the Timer TB2 clock input TB2CLK and ADC input A10. |
| 42 | P5.1/TB2.2/MFM.TX/A9 | bidirectional | General-purpose I/O P5.1 multiplexed with Timer TB2 CCR2 output TB2.2, Manchester module transmit MFM.TX and ADC input A9. |
| 43 | P5.0/TB2.1/MFM.RX/A8 | bidirectional | General-purpose I/O P5.0 multiplexed with Timer TB2 CCR1 output TB2.1, Manchester module receive MFM.RX and ADC input A8. |
| 44 | P3.3/OA2+ | bidirectional | General-purpose I/O P3.3 multiplexed with the non-inverting input OA2+ of SAC2 (MSP430FR235x only). |
| 45 | P3.2/OA2- | bidirectional | General-purpose I/O P3.2 multiplexed with the inverting input OA2- of SAC2 (MSP430FR235x only). |
| 46 | P3.1/OA2O | bidirectional | General-purpose I/O P3.1 multiplexed with the SAC2 operational amplifier output OA2O (MSP430FR235x only). |
| 47 | P3.0/MCLK | bidirectional | General-purpose I/O P3.0 multiplexed with the MCLK output. |
| 48 | P1.3/UCB0SOMI/UCB0SCL/OA0+/A3 | bidirectional | General-purpose I/O P1.3 multiplexed with eUSCI_B0 SPI SOMI or I2C SCL, OA0+ (MSP430FR235x only) and ADC input A3. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## CAD (KiCad official)
- Symbol: `MSP430FR2355TPT`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `msp430fr2355tpt-etched.step` / `msp430fr2355tpt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fr2355tpt.step` / `msp430fr2355tpt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fr2355) (152 pp, sha256 `f1ebe8a259a8e556`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/msp430fr2355tpt-datasheet.pdf)