component
MS9280
Public Made by Adomby adom
Hangzhou Ruimeng Tech Analog To Digital Converters (ADC), SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"number": "1",
"name": "AVSS",
"type": "power_in",
"description": "Analog ground for the ADC core, to which AIN and the reference network are referenced (absolute maximum AVSS to AVDD is -0.3 V to +6.5 V)."
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{
"number": "2",
"name": "DRVDD",
"type": "power_in",
"description": "Digital output driver supply, specified at 2.7 V to 5.5 V (3 V typical), with absolute maximum DRVDD to DRVSS of -0.3 V to +6.5 V."
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{
"number": "3",
"name": "D0",
"type": "tri_state",
"description": "Digital output bit 0, the least significant bit of the binary output; high-impedance when THREE_STATE is high."
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{
"number": "4",
"name": "D1",
"type": "tri_state",
"description": "Digital output bit 1 of the 10-bit binary output; high-impedance when THREE_STATE is high."
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{
"number": "5",
"name": "D2",
"type": "tri_state",
"description": "Digital output bit 2 of the 10-bit binary output; high-impedance when THREE_STATE is high."
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{
"number": "6",
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"type": "tri_state",
"description": "Digital output bit 3 of the 10-bit binary output; high-impedance when THREE_STATE is high."
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{
"number": "7",
"name": "D4",
"type": "tri_state",
"description": "Digital output bit 4 of the 10-bit binary output; high-impedance when THREE_STATE is high."
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{
"number": "8",
"name": "D5",
"type": "tri_state",
"description": "Digital output bit 5 of the 10-bit binary output; high-impedance when THREE_STATE is high."
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{
"number": "9",
"name": "D6",
"type": "tri_state",
"description": "Digital output bit 6 of the 10-bit binary output; high-impedance when THREE_STATE is high."
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{
"number": "10",
"name": "D7",
"type": "tri_state",
"description": "Digital output bit 7 of the 10-bit binary output; high-impedance when THREE_STATE is high."
},
{
"number": "11",
"name": "D8",
"type": "tri_state",
"description": "Digital output bit 8 of the 10-bit binary output; high-impedance when THREE_STATE is high."
},
{
"number": "12",
"name": "D9",
"type": "tri_state",
"description": "Digital output bit 9, the most significant bit of the binary output; high-impedance when THREE_STATE is high."
},
{
"number": "13",
"name": "OTR",
"type": "output",
"description": "Out-of-range flag that indicates the input has exceeded the minimum or maximum quantization range."
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{
"number": "14",
"name": "DRVSS",
"type": "power_in",
"description": "Digital ground for the output drivers, with DRVSS to AVSS limited to -0.3 V to +0.3 V."
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{
"number": "15",
"name": "CLK",
"type": "input",
"description": "Conversion clock input referenced to AVSS with a threshold of AVDD/2; maximum rate 35 MHz with minimum high and low pulse widths of 10 ns."
},
{
"number": "16",
"name": "THREE_STATE",
"type": "input",
"description": "Output three-state control: logic high places D0-D9 in high impedance, logic low gives normal operation."
},
{
"number": "17",
"name": "STBY",
"type": "input",
"description": "Standby control: logic high puts the device in standby (sleep) mode, logic low selects normal operation; the device returns to normal mode about 400 ns after STBY goes low."
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{
"number": "18",
"name": "REFSENSE",
"type": "input",
"description": "Reference mode select input that chooses between the internal 1 V/2 V reference configurations and external reference operation (see Table 1 and Figures 2d-2g)."
},
{
"number": "19",
"name": "CLAMP",
"type": "input",
"description": "Clamp control: logic high enables clamp mode, logic low selects non-clamp mode; the clamp is active while CLAMP is high."
},
{
"number": "20",
"name": "CLAMPIN",
"type": "input",
"description": "Clamp voltage input that sets the DC level the AIN input is clamped to; the recommended range is 0.5 V to 2.5 V."
},
{
"number": "21",
"name": "REFTS",
"type": "passive",
"description": "High reference voltage (top reference) for the ADC, with a range of 1 V to AVDD."
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{
"number": "22",
"name": "REFTF",
"type": "passive",
"description": "High reference decoupling pin, requiring the decoupling network shown in Figure 3 (10 µF and 0.1 µF capacitors)."
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{
"number": "23",
"name": "MODE",
"type": "input",
"description": "Mode select input that sets the input range and top/bottom, middle or differential reference configuration (see Table 1); it is tied to AVDD in the main operating mode."
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{
"number": "24",
"name": "REFBF",
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{
"number": "25",
"name": "REFBS",
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"description": "Low reference voltage (bottom reference) for the ADC, with a range of AVSS (GND) to AVDD-1 V."
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"number": "26",
"name": "VREF",
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{
"number": "27",
"name": "AIN",
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{
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{
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