component
MP6924AGS-Z
Public Made by Adomby adom
Monolithic Power Systems AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "mp6924ags-z",
"version": "0.1.0",
"type": "component",
"description": "Monolithic Power Systems AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"mp6924ags-z",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"mp6924ags-z.kicad_sym",
"mp6924ags-z.kicad_mod",
"mp6924ags-z.glb",
"mp6924ags-z.step",
"mp6924ags-z.lbr",
"docs/hero.png",
"docs/mp6924ags-z-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"mp6924ags-z-hero.glb",
"mp6924ags-z-hero.overlay.json",
"mp6924ags-z-etched.glb"
],
"component": {
"mpn": "MP6924AGS-Z",
"manufacturer": "Monolithic Power Systems",
"package": "SOIC-8",
"pin_count": 8,
"category": "Power Management (PMIC)",
"subcategory": "AC-DC Controllers And Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042235178827776",
"parts": {
"symbol": "mp6924ags-z.kicad_sym",
"footprint": "mp6924ags-z.kicad_mod",
"model_3d": "mp6924ags-z-hero.glb",
"model_3d_plain": "mp6924ags-z-etched.glb",
"model_3d_step": "mp6924ags-z-etched.step",
"model_3d_step_plain": "mp6924ags-z.step",
"lbr": "mp6924ags-z.lbr"
},
"distributor_links": {
"lcsc": "C3687423",
"digikey": "MP6924AGS-Z-ND",
"mouser": "946-MP6924AGS-Z"
},
"distributor_check": {
"checked_at": "2026-10-18T05:41:58Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "MP6924AGS-Z-ND",
"status": "found",
"lifecycle": "Not For New Designs"
},
"mouser": {
"pn": "946-MP6924AGS-Z",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VG2",
"type": "output",
"description": "MOSFET 2 gate driver output, with VG high at 11.5 V to 13 V when VDD is above 10 V and a maximum source current of 0.13 A for the MP6924A (0.5 A for the MP6924)."
},
{
"number": "2",
"name": "PGND",
"type": "power_in",
"description": "Power ground that serves as the power switch return, with PGND to VSS limited to -0.3 V to +0.3 V."
},
{
"number": "3",
"name": "LL",
"type": "input",
"description": "Light-load timing setting pin where a resistor RLL sets the light-load enter timing (TLL = 2.3 µs at 100 kΩ), leaving it open disables light-load mode, and pulling it low disables the gate driver (VLL_DIS 0.1 V to 0.3 V)."
},
{
"number": "4",
"name": "VD2",
"type": "input",
"description": "MOSFET 2 drain voltage sense, with VD rated from -1 V to +180 V to VSS and an input bias current of 1 µA at VD = 180 V."
},
{
"number": "5",
"name": "VSS",
"type": "power_in",
"description": "Source pin used as the reference for the VD1 and VD2 drain voltage sensing, with VDD to VSS rated from -0.3 V to +38 V absolute maximum."
},
{
"number": "6",
"name": "VD1",
"type": "input",
"description": "MOSFET 1 drain voltage sense, with VD rated from -1 V to +180 V to VSS and a 1 kΩ series resistor recommended to the MOSFET drain to limit current when VDS goes below -0.7 V."
},
{
"number": "7",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage with a recommended operating range of 4.2 V to 35 V and a UVLO rising threshold of 3.7 V to 4.2 V."
},
{
"number": "8",
"name": "VG1",
"type": "output",
"description": "MOSFET 1 gate driver output, with VG high at 11.5 V to 13 V when VDD is above 10 V and a maximum source current of 0.5 A for the MP6924 (0.13 A for the MP6924A)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The MPN MP6924AGS-Z is the MP6924AGS in tape and reel (the -Z suffix). The datasheet lists the SOIC-; Pin types are my classification, not printed in the datasheet. LL is typed as input because it is a ; The Electrical Characteristics table gives the maximum source current for the gate outputs as 0.5 A "
],
"pages_sent": 15,
"cost_usd": 0.0601,
"at": "2026-10-18T05:40:52"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042235178827776",
"pages": 15,
"sha256": "7a25e491586f2ae9",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
},
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"role": "plain",
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"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"zmin_mm": -0.0,
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"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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"sha256": "0d2d35650c2b1869aa70ffdec12fa2a0b91d133aac2c6a6dce6b06e9931a4a16",
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}