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MP6924AGS-Z

Public Made by Adom

by adom

Monolithic Power Systems AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MP6924AGS-Z

Monolithic Power Systems · AC-DC Controllers And Regulators · SOIC-8

MP6924AGS-Z from Monolithic Power Systems, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VG2 output MOSFET 2 gate driver output, with VG high at 11.5 V to 13 V when VDD is above 10 V and a maximum source current of 0.13 A for the MP6924A (0.5 A for the MP6924).
2 PGND power_in Power ground that serves as the power switch return, with PGND to VSS limited to -0.3 V to +0.3 V.
3 LL input Light-load timing setting pin where a resistor RLL sets the light-load enter timing (TLL = 2.3 µs at 100 kΩ), leaving it open disables light-load mode, and pulling it low disables the gate driver (VLL_DIS 0.1 V to 0.3 V).
4 VD2 input MOSFET 2 drain voltage sense, with VD rated from -1 V to +180 V to VSS and an input bias current of 1 µA at VD = 180 V.
5 VSS power_in Source pin used as the reference for the VD1 and VD2 drain voltage sensing, with VDD to VSS rated from -0.3 V to +38 V absolute maximum.
6 VD1 input MOSFET 1 drain voltage sense, with VD rated from -1 V to +180 V to VSS and a 1 kΩ series resistor recommended to the MOSFET drain to limit current when VDS goes below -0.7 V.
7 VDD power_in Supply voltage with a recommended operating range of 4.2 V to 35 V and a UVLO rising threshold of 3.7 V to 4.2 V.
8 VG1 output MOSFET 1 gate driver output, with VG high at 11.5 V to 13 V when VDD is above 10 V and a maximum source current of 0.5 A for the MP6924 (0.13 A for the MP6924A).

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD voltage range 4.2 35 V 4
VDD UVLO rising 3.7 3.95 4.2 V 4
VDD UVLO hysteresis 0.13 0.185 0.24 V 4
Operating current ICC 16 20 mA CLOAD = 4.7nF, FSW = 100kHz 4
Quiescent current IQ 4.6 6 mA VSS - VD = 0.5V 4
Shutdown current 135 190 µA VDD = 4V, LL = 0V 4
Shutdown current 155 210 µA VDD = 20V, LL = 0V 4
Light-load mode current 175 225 µA 4
Thermal shutdown (MP6924A) 175 °C 4
Thermal shutdown hysteresis 10 °C 4
VSS - VD forward voltage (MP6924A) Vfwd 17 29 41 mV 4
Turn off threshold (VSS - VD) -56 -40 -20 mV 4
Turn-on delay (MP6924A) tDon 190 300 ns CLOAD = 4.7nF, VGS = 2V 4
Turn-on delay (MP6924A) tDon 270 410 ns CLOAD = 10nF, VGS = 2V 4
Input bias current on VD 1 µA VD = 180V 4
Turn-on blanking time tB_ON 0.75 1.1 1.65 µs CLOAD = 4.7nF 4
Turn-off blanking time (MP6924A) tB_OFF 1750 ns CLOAD = 4.7nF 4
Turn-off blanking VDS threshold (MP6924A disabled) VB_OFF 1 1.7 2.5 V MP6924A disabled 4
Light-load enter pulse width TLL 1.7 2.3 3 µs RLL = 100kΩ 4
Light-load turn-on pulse width hysteresis TLL-H 0.45 µs RLL = 100kΩ 4
Light-load enter delay (MP6924A) TLL-D 45 78 121 µs 4
Gate disable threshold on LL VLL_DIS 0.1 0.2 0.3 V 4
Turn-on threshold (VDS) VLL_DS -330 -230 -130 mV VDD = 12V 4
VG (low) VG_L 0.1 V ILOAD = 1mA 4
VG (high) VG_H 11.5 13 V VDD > 10V 4
Turn-off propagation delay 15 ns VD = VSS 4
Turn-off total delay tDoff 35 80 ns VD = VSS, CLOAD = 4.7nF, RGATE = 0Ω, VGS = 2V 4
Turn-off total delay tDoff 45 100 ns VD = VSS, CLOAD = 10nF, RGATE = 0Ω, VGS = 2V 4
Maximum source current (MP6924A) 0.13 A 4
Pull-down impedance 0.6 1.5 Ω 4
VDD to VSS -0.3 38 V 3
PGND to VSS -0.3 0.3 V 3
VG to VSS -0.3 20 V 3
VD to VSS -1 180 V 3
LL to VSS -0.3 6.5 V 3
Junction temperature 150 °C 3
Storage temperature -55 150 °C 3
Operating junction temperature (TJ) TJ -40 125 °C 3
Thermal resistance junction-to-ambient (SOIC-8) θJA 90 °C/W Measured on JESD51-7, 4-layer PCB 3
Thermal resistance junction-to-case (SOIC-8) θJC 45 °C/W Measured on JESD51-7, 4-layer PCB 3

CAD (KiCad official)

  • Symbol: MP6924AGS-Z
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mp6924ags-z-etched.step / mp6924ags-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp6924ags-z.step / mp6924ags-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (15 pp, sha256 7a25e491586f2ae9, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF