component
MP3414AGJ-Z
Public Made by Adomby adom
Monolithic Power Systems DC-DC Converters, TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MP3414AGJ-Z
Monolithic Power Systems · DC-DC Converters · TSOT-23-8
MP3414AGJ-Z from Monolithic Power Systems, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Power supply input whose start-up bias is derived from IN and must be bypassed locally, with bias moving to OUT once VOUT exceeds VIN. |
| 2 | OUT | power_out | Output at the drain of the internal synchronous rectifier MOSFET, which derives bias power from OUT when VOUT is higher than VIN and allows OUT to be disconnected completely from IN when EN is low, with the trace to the output filter capacitors kept as short and wide as possible. |
| 3 | SW | output | Power switch output connecting the internal low-side and synchronous MOSFETs, where the power inductor connects between SW and the input supply and the trace should be kept short and wide to reduce EMI and voltage spikes. |
| 4 | PGND | power_in | Power ground. |
| 5 | FTY | passive | Factory use only; leave floating or connect it to ground in the application. |
| 6 | AGND | power_in | Analog ground. |
| 7 | FB | input | Feedback input to be connected to the tap of an external resistive voltage divider from the output, which sets the output voltage. |
| 8 | EN | input | Chip enable control input that turns the regulator on when set higher than 1.2V and turns it off when set lower than 0.4V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SW, OUT pin voltage (absolute maximum) | -0.3 | 6.5 | V | 3 | |||
| SW pin voltage, <5ns (absolute maximum) | -1 | 9 | V | <5ns | 3 | ||
| All other pins voltage (absolute maximum) | -0.3 | 6.5 | V | 3 | |||
| Continuous power dissipation (absolute maximum) | 1.25 | W | TA = +25°C | 3 | |||
| Junction temperature (absolute maximum) | 150 | °C | 3 | ||||
| Lead temperature (absolute maximum) | 260 | °C | 3 | ||||
| Storage temperature (absolute maximum) | -65 | 150 | °C | 3 | |||
| Supply voltage (recommended operating) | VIN | 1.8 | 5.5 | V | 3 | ||
| Output voltage (recommended operating) | VOUT | 5.5 | V | Min is VIN-MAX x 106% (not numeric, see note 4) | 3 | ||
| Operating junction temperature (recommended operating) | TJ | -40 | 125 | °C | 3 | ||
| Quiescent current measured on OUT | IQ | 22 | 30 | µA | VEN = VIN = 3.3V, VOUT = 5V, no load, VFB = 0.65V, measured on OUT, TJ = 25°C | 4 | |
| Quiescent current measured on IN | IQ | 8 | 12 | µA | VEN = VIN = 3.3V, VOUT = 5V, no load, VFB = 0.65V, measured on IN, TJ=25°C | 4 | |
| Shutdown current | ISD | 0.1 | 1 | µA | VEN = VOUT = 0V, measured on IN TJ = 25°C | 4 | |
| IN under-voltage lockout | VIN UVLO | 1.65 | 1.7 | V | VIN rising, TJ = 25°C | 4 | |
| Operation frequency | FSW | 0.8 | 1 | 1.2 | MHz | 4 | |
| Feedback voltage reference | VFB | 594 | 600 | 606 | mV | TJ = 25°C | 4 |
| Feedback voltage reference | VFB | 591 | 600 | 609 | mV | TJ = -40°C to 125°C | 4 |
| Feedback input current | IFB | 1 | 50 | nA | VFB = 0.63V | 4 | |
| NMOS leakage current | IN LK | 0.1 | 1 | µA | VSW = 6.5V, TJ = 25°C | 4 | |
| PMOS leakage current | IP LK | 0.1 | 1 | µA | VSW = 6.5V, VOUT = 0V, TJ = 25°C | 4 | |
| Maximum duty cycle | DMAX | 85 | 95 | % | 4 | ||
| NMOS current limit | ISW LIMIT | 3 | 3.6 | A | Duty = 40% | 4 | |
| EN input high-level voltage | VEN H | 1.2 | V | 4 | |||
| EN input low-level voltage | VEN L | 0.4 | V | 4 | |||
| IN under-voltage lockout hysteresis | 100 | mV | 4 | ||||
| NMOS on resistance | RNDS ON | 70 | mΩ | 4 | |||
| PMOS on resistance | RPDS ON | 80 | mΩ | 4 | |||
| Start-up current limit | IST_LIMIT | 0.3 | A | VIN = 4V, Vo = 0V | 4 | ||
| Start-up current limit | IST_LIMIT | 0.8 | A | VIN = 4V, Vo setting = 3.6V, pull Vo to 3.3V | 4 | ||
| EN input current | IEN | 10 | nA | Connect to VIN | 4 | ||
| Thermal shutdown (guaranteed by characterization, not production tested) | 155 | °C | 4 | ||||
| Over-temperature hysteresis (guaranteed by characterization, not production tested) | 25 | °C | 4 | ||||
| Thermal resistance junction-to-ambient, TSOT23-8 | θJA | 100 | °C/W | Measured on JESD51-7, 4-layer PCB | 3 | ||
| Thermal resistance junction-to-case, TSOT23-8 | θJC | 55 | °C/W | Measured on JESD51-7, 4-layer PCB | 3 |
CAD (KiCad official)
- Symbol:
MP3414AGJ-Z - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
mp3414agj-z-etched.step/mp3414agj-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp3414agj-z.step/mp3414agj-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (17 pp, sha256
ecb17e521f7f9b5c, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MP3414AGJ-Z
**Monolithic Power Systems** · DC-DC Converters · TSOT-23-8
MP3414AGJ-Z from Monolithic Power Systems, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Power supply input whose start-up bias is derived from IN and must be bypassed locally, with bias moving to OUT once VOUT exceeds VIN. |
| 2 | OUT | power_out | Output at the drain of the internal synchronous rectifier MOSFET, which derives bias power from OUT when VOUT is higher than VIN and allows OUT to be disconnected completely from IN when EN is low, with the trace to the output filter capacitors kept as short and wide as possible. |
| 3 | SW | output | Power switch output connecting the internal low-side and synchronous MOSFETs, where the power inductor connects between SW and the input supply and the trace should be kept short and wide to reduce EMI and voltage spikes. |
| 4 | PGND | power_in | Power ground. |
| 5 | FTY | passive | Factory use only; leave floating or connect it to ground in the application. |
| 6 | AGND | power_in | Analog ground. |
| 7 | FB | input | Feedback input to be connected to the tap of an external resistive voltage divider from the output, which sets the output voltage. |
| 8 | EN | input | Chip enable control input that turns the regulator on when set higher than 1.2V and turns it off when set lower than 0.4V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SW, OUT pin voltage (absolute maximum) | | -0.3 | | 6.5 | V | | 3 |
| SW pin voltage, <5ns (absolute maximum) | | -1 | | 9 | V | <5ns | 3 |
| All other pins voltage (absolute maximum) | | -0.3 | | 6.5 | V | | 3 |
| Continuous power dissipation (absolute maximum) | | | | 1.25 | W | TA = +25°C | 3 |
| Junction temperature (absolute maximum) | | | | 150 | °C | | 3 |
| Lead temperature (absolute maximum) | | | | 260 | °C | | 3 |
| Storage temperature (absolute maximum) | | -65 | | 150 | °C | | 3 |
| Supply voltage (recommended operating) | VIN | 1.8 | | 5.5 | V | | 3 |
| Output voltage (recommended operating) | VOUT | | | 5.5 | V | Min is VIN-MAX x 106% (not numeric, see note 4) | 3 |
| Operating junction temperature (recommended operating) | TJ | -40 | | 125 | °C | | 3 |
| Quiescent current measured on OUT | IQ | | 22 | 30 | µA | VEN = VIN = 3.3V, VOUT = 5V, no load, VFB = 0.65V, measured on OUT, TJ = 25°C | 4 |
| Quiescent current measured on IN | IQ | | 8 | 12 | µA | VEN = VIN = 3.3V, VOUT = 5V, no load, VFB = 0.65V, measured on IN, TJ=25°C | 4 |
| Shutdown current | ISD | | 0.1 | 1 | µA | VEN = VOUT = 0V, measured on IN TJ = 25°C | 4 |
| IN under-voltage lockout | VIN UVLO | 1.65 | 1.7 | | V | VIN rising, TJ = 25°C | 4 |
| Operation frequency | FSW | 0.8 | 1 | 1.2 | MHz | | 4 |
| Feedback voltage reference | VFB | 594 | 600 | 606 | mV | TJ = 25°C | 4 |
| Feedback voltage reference | VFB | 591 | 600 | 609 | mV | TJ = -40°C to 125°C | 4 |
| Feedback input current | IFB | | 1 | 50 | nA | VFB = 0.63V | 4 |
| NMOS leakage current | IN LK | | 0.1 | 1 | µA | VSW = 6.5V, TJ = 25°C | 4 |
| PMOS leakage current | IP LK | | 0.1 | 1 | µA | VSW = 6.5V, VOUT = 0V, TJ = 25°C | 4 |
| Maximum duty cycle | DMAX | | 85 | 95 | % | | 4 |
| NMOS current limit | ISW LIMIT | 3 | 3.6 | | A | Duty = 40% | 4 |
| EN input high-level voltage | VEN H | 1.2 | | | V | | 4 |
| EN input low-level voltage | VEN L | | | 0.4 | V | | 4 |
| IN under-voltage lockout hysteresis | | | 100 | | mV | | 4 |
| NMOS on resistance | RNDS ON | | 70 | | mΩ | | 4 |
| PMOS on resistance | RPDS ON | | 80 | | mΩ | | 4 |
| Start-up current limit | IST_LIMIT | | 0.3 | | A | VIN = 4V, Vo = 0V | 4 |
| Start-up current limit | IST_LIMIT | | 0.8 | | A | VIN = 4V, Vo setting = 3.6V, pull Vo to 3.3V | 4 |
| EN input current | IEN | | 10 | | nA | Connect to VIN | 4 |
| Thermal shutdown (guaranteed by characterization, not production tested) | | | 155 | | °C | | 4 |
| Over-temperature hysteresis (guaranteed by characterization, not production tested) | | | 25 | | °C | | 4 |
| Thermal resistance junction-to-ambient, TSOT23-8 | θJA | | 100 | | °C/W | Measured on JESD51-7, 4-layer PCB | 3 |
| Thermal resistance junction-to-case, TSOT23-8 | θJC | | 55 | | °C/W | Measured on JESD51-7, 4-layer PCB | 3 |
## CAD (KiCad official)
- Symbol: `MP3414AGJ-Z`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-8`
- 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `mp3414agj-z-etched.step` / `mp3414agj-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp3414agj-z.step` / `mp3414agj-z.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603367137713143808) (17 pp, sha256 `ecb17e521f7f9b5c`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mp3414agj-z-datasheet.pdf)