# MP28167GQ-Z

**Monolithic Power Systems** · DC-DC Converters · QFN-16(3x3)

MP28167GQ-Z from Monolithic Power Systems, in a QFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Supply voltage and drain of the internal power device that powers the whole chip; operates from 2.8V to 22V, and a input capacitor CIN must be placed as close to the IC as possible to limit voltage spikes. |
| 2 | GND | power_in | Power ground and reference ground of the regulated output voltage, requiring copper traces and vias for connection and extra care in PCB layout. |
| 3 | EN | input | On/off control for the entire chip: drive high to turn on, drive low or float to turn off; EN has an internal 2MΩ pull-down resistor to ground. |
| 4 | NC | unconnected | No connection; the datasheet states this pin should be connected to GND. |
| 5 | RSV1 | passive | Reserved pin that cannot be floated and can be tied to GND or VCC. |
| 6 | RSV2 | passive | Reserved pin that cannot be floated and can be tied to GND or VCC. |
| 7 | OC | input | Output constant current limit set pin, where the current-limit resistor R_OC sets the I_LIMIT value per Equation (1) and Table 1. |
| 8 | NC | unconnected | No connection; the datasheet states this pin should be connected to GND. |
| 9 | VCC | power_out | Internal 3.65V LDO regulator output that must be decoupled with a 1µF capacitor. |
| 10 | AGND | power_in | Analog ground that must be connected to GND. |
| 11 | GND | power_in | Power ground and reference ground of the regulated output voltage, requiring copper traces and vias for connection and extra care in PCB layout. |
| 12 | OUT | power_out | Output power pin, where the output capacitor must be placed close to OUT and GND; the regulated output is fixed at 5V and absolute OVP trips at 23V. |
| 13 | BST2 | passive | Bootstrap pin; a 0.1µF capacitor is connected between SW2 and BST2 to form a floating supply for the high-side switch driver. |
| 14 | SW2 | passive | Switching node of the second half-bridge, where one end of the inductor connects to carry the bridge current. |
| 15 | SW1 | passive | Switching node of the first half-bridge, where one end of the inductor connects to carry the bridge current. |
| 16 | BST1 | passive | Bootstrap pin; a 0.1µF capacitor is connected between SW1 and BST1 to form a floating supply for the high-side switch driver. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | QFN-16(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VIN, VOUT) | VIN, VOUT |  |  | 24 | V |  | 4 |
| Switch node voltage VSW1, SW2 | VSW1, SW2 | -0.3 |  |  | V |  | 4 |
| Switch node voltage VSW1, SW2 (transient) | VSW1, SW2 | -7 |  |  | V | <10ns | 4 |
| Switch node voltage VSW1, SW2 (transient) | VSW1, SW2 |  |  | 26 | V | <10ns | 4 |
| VEN | VEN | -0.3 |  | 24 | V |  | 4 |
| All other pins |  | -0.3 |  | 4 | V |  | 4 |
| Continuous power dissipation |  |  |  | 4.8 | W | TA = +25°C | 4 |
| Junction temperature |  |  |  | 150 | C |  | 4 |
| Storage temperature |  | -65 |  | 150 | C |  | 4 |
| Operation input voltage range |  | 2.8 |  | 22 | V |  | 4 |
| Output current |  |  |  | 3 | A | 3A continuous current | 4 |
| Input current |  |  |  | 4 | A | 4A input current | 4 |
| Operating junction temperature (TJ) | TJ | -40 |  | 125 | C |  | 4 |
| Supply current (shutdown) | IIN |  | 0 | 3 | μA | VEN = 0V | 5 |
| Supply current (quiescent) | IQ |  |  | 1 | mA | Remove inductor, add 5.8V to VOUT | 5 |
| EN rising threshold | VEN_Rising | 1 | 1.1 | 1.2 | V |  | 5 |
| EN hysteresis | VEN_Falling | 65 | 110 | 160 | mV |  | 5 |
| EN on to VOUT > 90% delay | TDelay |  |  | 500 | μs | See Figure 7 | 5 |
| VCC regulator | VCC | 3.3 | 3.65 | 4 | V |  | 5 |
| VCC load regulation | VCC_LOG |  |  | 1 | % | ICC = 10mA | 5 |
| VIN under-voltage lockout threshold rising | VIN_UVLO | 2.5 | 2.65 | 2.8 | V |  | 5 |
| VIN under-voltage lockout threshold hysteresis | VUVLO_HYS | 95 | 160 | 205 | mV |  | 5 |
| HS switch on resistance | RDSON_HS |  | 25 | 40 | mΩ | Switch A, D | 5 |
| LS switch on resistance | RDSON_LSB |  | 21 | 35 | mΩ | Switch B, C | 5 |
| Output voltage tolerance | VOUT | -1.5 |  | 1.5 | % |  | 5 |
| Output discharge resistance | RDIS |  | 60 | 100 | Ω |  | 5 |
| Switch leakage | SWLKG |  |  | 1 | μA | VEN = 0V, VSW1, SW2 = 22V, TJ = +25°C | 5 |
| Switch leakage | SWLKG |  |  | 5 | μA | EN = 0V, VSW1, SW2 = 22V, TJ = -40°C to +125°C | 5 |
| Oscillator frequency tolerance | fS | -20 |  | 20 | % | TJ = +25°C | 5 |
| Minimum on time | tON_MIN1 |  |  | 160 | ns | Switch A, B, C, D | 5 |
| Maximum duty cycle | DMAX |  |  | 85 | % | Buck mode, FREQ = 500kHz | 5 |
| Minimum duty cycle | DMIN | 15 |  |  | % | Boost mode, FREQ = 500kHz | 5 |
| Output over-voltage protection | VOVP_R | 150 | 160 | 170 | % |  | 5 |
| Output OVP recovery | VOVP_F | 130 | 140 | 150 | % |  | 5 |
| Low-side B valley limit | ILIMIT2 | 6 | 8 | 10 | A | Switch B | 5 |
| Low-side C peak current limit | ILIMIT3 |  |  | 10 | A | Switch C | 5 |
| Output average current tolerance | IOUT_LIM2 | -5 |  | 5 | % | VOUT = 5V, over 0-125°C temp range | 5 |
| Output UV threshold | VUVP | 45 | 50 | 55 | % VREF | 20µs deglitch, UV falling | 5 |
| Thermal shutdown rising threshold | TSTD |  |  | 150 | C |  | 6 |
| Thermal hysteresis | TSTD_HYS |  |  | 20 | C |  | 6 |
| EN to ground resistance | REN |  | 2 |  | MΩ | VEN = 2V | 5 |
| Output voltage | VOUT |  | 5 |  | V |  | 5 |
| Oscillator frequency | fS |  | 530 |  | kHz | TJ = +25°C | 5 |
| Output average current | IOUT_LIM2 |  | 3.5 |  | A | VOUT = 5V, over 0-125°C temp range | 5 |
| Thermal resistance junction-to-ambient (EV28167-Q-00A board) | θJA |  | 26 |  | C/W | EV28167-Q-00A, 4-layer PCB, 64mmx64mm | 4 |
| Thermal resistance junction-to-case (EV28167-Q-00A board) | θJC |  | 3 |  | C/W | EV28167-Q-00A, 4-layer PCB, 64mmx64mm | 4 |
| Thermal resistance junction-to-ambient (JESD51-7) | θJA |  | 50 |  | C/W | JESD51-7, 4-layer PCB | 4 |
| Thermal resistance junction-to-case (JESD51-7) | θJC |  | 12 |  | C/W | JESD51-7, 4-layer PCB | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | close to the IC’s VIN-to-GND and OUT-to￾GND pins, respectively. 2. Use a large copper plane for PGND. Add | 17 |

## CAD (KiCad official)

- Symbol: `MP28167GQ-Z`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: QFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files: `mp28167gq-z-etched.step` / `mp28167gq-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp28167gq-z.step` / `mp28167gq-z.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588919898886320128) (19 pp, sha256 `bdc319967e4eae84`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mp28167gq-z-datasheet.pdf)