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Contents

README

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MP1482DS-LF-Z

Monolithic Power Systems · DC-DC Converters · SOIC-8

MP1482DS-LF-Z from Monolithic Power Systems, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS power_in High-side gate drive boost input; connect a 0.01µF or greater capacitor from SW to BS to power the high-side switch.
2 IN power_in Power input that supplies the IC and the step-down switches; drive it with a 4.75V to 18V source and bypass it to GND with a suitably large capacitor.
3 SW output Power switching output node that supplies the output through the LC filter; a capacitor is required from SW to BS to power the high-side switch.
4 GND power_in Ground reference for the device.
5 FB input Feedback input that senses the output voltage through a resistive divider; the feedback threshold is 0.923V.
6 COMP passive Compensation node for the control loop; connect a series RC network from COMP to GND, with an additional capacitor from COMP to GND in some cases.
7 EN input Digital enable input that turns the regulator on when driven high and off when driven low; pull up with a 100kΩ resistor for automatic startup.
8 SS passive Soft-start control input; a capacitor from SS to GND sets the soft-start period (0.1µF gives 15ms), and leaving SS unconnected disables soft-start.

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Shutdown Supply Current 1 3 μA VEN = 0V 3
Supply Current 1.3 1.5 mA VEN = 2.0V; VFB = 1.0V 3
Feedback Voltage VFB 0.9 0.923 0.946 V 4.75V ≤ VIN ≤ 18V 3
Upper Switch Current Limit Minimum Duty Cycle 2.4 3.4 A 3
Oscillation Frequency Fosc1 305 340 375 kHz 3
EN Shutdown Threshold Voltage VEN 1.1 1.5 2 V VEN Rising 3
EN Lockout Threshold Voltage 2.2 2.5 2.7 V 3
Input Under Voltage Lockout Threshold 3.8 4.1 4.4 V VIN Rising 3
Input Voltage VIN -0.3 20 V Supply Voltage 2
Switch Node Voltage VSW 21 V 2
Boost Voltage VBS -0.3 6 V Referenced to VSW: VSW, 0.3V to VSW + 6V 2
All Other Pins -0.3 6 V 2
Junction Temperature 150 °C 2
Storage Temperature -65 150 °C 2
Input Voltage VIN 4.75 18 V 2
Output Voltage VOUT 0.923 15 V 2
Operating Junction Temperature TJ -40 125 °C 2
Feedback Overvoltage Threshold 1.1 V 3
Error Amplifier Voltage Gain AEA 400 V/V 3
Error Amplifier Transconductance GEA 800 μA/V IC = 10μA 3
High-Side Switch On Resistance RDS(ON)1 130 mΩ 3
Low-Side Switch On Resistance RDS(ON)2 130 mΩ 3
High-Side Switch Leakage Current 10 μA VEN = 0V, VSW = 0V 3
Lower Switch Current Limit 1.1 A From Drain to Source 3
COMP to Current Sense Transconductance GCS 3.5 A/V 3
Short Circuit Oscillation Frequency Fosc2 100 kHz VFB = 0V 3
Maximum Duty Cycle DMAX 90 % VFB = 1.0V 3
Minimum On Time 220 ns 3
EN Shutdown Threshold Voltage Hysteresis 210 mV 3
EN Lockout Threshold Hysteresis 210 mV 3
Input Under Voltage Lockout Threshold Hysteresis 210 mV 3
Soft-Start Current 6 μA VSS = 0V 3
Soft-Start Period 15 ms CSS = 0.1μF 3
Thermal Shutdown 160 °C 3
Thermal Resistance Junction-to-Ambient θJA 90 C/W SOIC8, measured on JESD51-7, 4-layer board 2
Thermal Resistance Junction-to-Case θJC 45 C/W SOIC8, measured on JESD51-7, 4-layer board 2

CAD (KiCad official)

  • Symbol: MP1482DS-LF-Z
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mp1482ds-lf-z-etched.step / mp1482ds-lf-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp1482ds-lf-z.step / mp1482ds-lf-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (12 pp, sha256 25e37463b8d998ec, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF