component
MM74HCT32M
Public Made by Adomby adom
onsemi Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MM74HCT32M
onsemi · Logic Gates · SOIC-14
MM74HCT32M from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 2 | B1 | input | Gate 1 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 3 | Y1 | output | Gate 1 OR output (Y1 = A1 + B1); rated for ±25mA maximum DC output current per pin. |
| 4 | A2 | input | Gate 2 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 5 | B2 | input | Gate 2 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 6 | Y2 | output | Gate 2 OR output (Y2 = A2 + B2); rated for ±25mA maximum DC output current per pin. |
| 7 | GND | power_in | Ground pin (0V reference); absolute maximum VCC or GND current is ±50mA per pin. |
| 8 | Y3 | output | Gate 3 OR output (Y3 = A3 + B3); rated for ±25mA maximum DC output current per pin. |
| 9 | A3 | input | Gate 3 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 10 | B3 | input | Gate 3 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 11 | Y4 | output | Gate 4 OR output (Y4 = A4 + B4); rated for ±25mA maximum DC output current per pin. |
| 12 | A4 | input | Gate 4 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 13 | B4 | input | Gate 4 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 14 | VCC | power_in | Positive supply; recommended operating range 4.5V to 5.5V, absolute maximum -0.5 to +7.0V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.5 | 5.5 | V | 4 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Input Rise or Fall Times | tr, tf | 500 | ns | 4 | |||
| DC Input or Output Voltage | VIN, VOUT | 0 | V | max = VCC | 4 | ||
| Supply Voltage (absolute) | VCC | -0.5 | 7 | V | 4 | ||
| DC Input Voltage (absolute) | VIN | -1.5 | V | max = VCC+1.5V | 4 | ||
| DC Output Voltage (absolute) | VOUT | -0.5 | V | max = VCC+0.5V | 4 | ||
| Clamp Diode Current | IIK, IOK | -20 | 20 | mA | 4 | ||
| DC Output Current, per pin | IOUT | -25 | 25 | mA | 4 | ||
| DC VCC or GND Current, per pin | ICC | -50 | 50 | mA | 4 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Power Dissipation | PD | 600 | mW | Note 2 | 4 | ||
| Power Dissipation S.O. Package | PD | 500 | mW | S.O. package only | 4 | ||
| Lead Temperature (Soldering 10 seconds) | TL | 260 | °C | 10 seconds soldering | 4 | ||
| Minimum HIGH Level Input Voltage | VIH | 2 | 2 | V | VCC = 5V ± 10% | 5 | |
| Maximum LOW Level Input Voltage | VIL | 0.8 | 0.8 | V | VCC = 5V ± 10% | 5 | |
| Minimum HIGH Level Output Voltage | VOH | 3.98 | 4.2 | V | VIN = VIH or VIL, /IOUT/ = 4.0mA, VCC = 4.5V, TA = 25°C | 5 | |
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | V | VIN = VIH or VIL, /IOUT/ = 4.0mA, VCC = 4.5V, TA = -40°C to +85°C | 5 | |
| Minimum HIGH Level Output Voltage | VOH | 4.98 | 5.2 | V | VIN = VIH or VIL, /IOUT/ = 4.8mA, VCC = 5.5V, TA = 25°C | 5 | |
| Minimum HIGH Level Output Voltage | VOH | 4.84 | 5.2 | V | VIN = VIH or VIL, /IOUT/ = 4.8mA, VCC = 5.5V, TA = -40°C to +85°C | 5 | |
| Maximum LOW Level Output Voltage | VOL | 0 | 0.1 | V | VIN = VIH, /IOUT/ = 20µA, TA = 25°C | 5 | |
| Maximum LOW Level Output Voltage | VOL | 0.2 | 0.26 | V | VIN = VIH, /IOUT/ = 4.0mA, VCC = 4.5V, TA = 25°C | 5 | |
| Maximum LOW Level Output Voltage | VOL | 0.2 | 0.33 | V | VIN = VIH, /IOUT/ = 4.0mA, VCC = 4.5V, TA = -40°C to +85°C | 5 | |
| Maximum Input Current | IIN | -1 | 0.1 | 1 | µA | VIN = VCC or GND, VIH or VIL | 5 |
| Maximum Quiescent Supply Current | ICC | 2 | 20 | µA | VIN = VCC or GND, IOUT = 0µA | 5 | |
| Maximum Quiescent Supply Current | ICC | 1.2 | 1.4 | mA | VIN = 2.4V or 0.5V | 5 | |
| Maximum Propagation Delay | tPLH, tPHL | 12 | 20 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = 25°C | 5 | |
| Maximum Propagation Delay | tPLH, tPHL | 12 | 25 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = -40°C to +85°C | 5 | |
| Maximum Output Rise & Fall Time | tTHL, tTLH | 8 | 15 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = 25°C | 5 | |
| Maximum Output Rise & Fall Time | tTHL, tTLH | 8 | 19 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = -40°C to +85°C | 5 | |
| Input Capacitance | CIN | 5 | 10 | pF | TA = 25°C | 5 |
CAD (KiCad official)
- Symbol:
MM74HCT32M - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mm74hct32m-etched.step/mm74hct32m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mm74hct32m.step/mm74hct32m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
f6f9a855f466c557, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MM74HCT32M
**onsemi** · Logic Gates · SOIC-14
MM74HCT32M from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 2 | B1 | input | Gate 1 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 3 | Y1 | output | Gate 1 OR output (Y1 = A1 + B1); rated for ±25mA maximum DC output current per pin. |
| 4 | A2 | input | Gate 2 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 5 | B2 | input | Gate 2 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 6 | Y2 | output | Gate 2 OR output (Y2 = A2 + B2); rated for ±25mA maximum DC output current per pin. |
| 7 | GND | power_in | Ground pin (0V reference); absolute maximum VCC or GND current is ±50mA per pin. |
| 8 | Y3 | output | Gate 3 OR output (Y3 = A3 + B3); rated for ±25mA maximum DC output current per pin. |
| 9 | A3 | input | Gate 3 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 10 | B3 | input | Gate 3 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 11 | Y4 | output | Gate 4 OR output (Y4 = A4 + B4); rated for ±25mA maximum DC output current per pin. |
| 12 | A4 | input | Gate 4 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 13 | B4 | input | Gate 4 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 14 | VCC | power_in | Positive supply; recommended operating range 4.5V to 5.5V, absolute maximum -0.5 to +7.0V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.5 | | 5.5 | V | | 4 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 4 |
| Input Rise or Fall Times | tr, tf | | | 500 | ns | | 4 |
| DC Input or Output Voltage | VIN, VOUT | 0 | | | V | max = VCC | 4 |
| Supply Voltage (absolute) | VCC | -0.5 | | 7 | V | | 4 |
| DC Input Voltage (absolute) | VIN | -1.5 | | | V | max = VCC+1.5V | 4 |
| DC Output Voltage (absolute) | VOUT | -0.5 | | | V | max = VCC+0.5V | 4 |
| Clamp Diode Current | IIK, IOK | -20 | | 20 | mA | | 4 |
| DC Output Current, per pin | IOUT | -25 | | 25 | mA | | 4 |
| DC VCC or GND Current, per pin | ICC | -50 | | 50 | mA | | 4 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 4 |
| Power Dissipation | PD | | | 600 | mW | Note 2 | 4 |
| Power Dissipation S.O. Package | PD | | | 500 | mW | S.O. package only | 4 |
| Lead Temperature (Soldering 10 seconds) | TL | | | 260 | °C | 10 seconds soldering | 4 |
| Minimum HIGH Level Input Voltage | VIH | 2 | 2 | | V | VCC = 5V ± 10% | 5 |
| Maximum LOW Level Input Voltage | VIL | | 0.8 | 0.8 | V | VCC = 5V ± 10% | 5 |
| Minimum HIGH Level Output Voltage | VOH | 3.98 | 4.2 | | V | VIN = VIH or VIL, /IOUT/ = 4.0mA, VCC = 4.5V, TA = 25°C | 5 |
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | | V | VIN = VIH or VIL, /IOUT/ = 4.0mA, VCC = 4.5V, TA = -40°C to +85°C | 5 |
| Minimum HIGH Level Output Voltage | VOH | 4.98 | 5.2 | | V | VIN = VIH or VIL, /IOUT/ = 4.8mA, VCC = 5.5V, TA = 25°C | 5 |
| Minimum HIGH Level Output Voltage | VOH | 4.84 | 5.2 | | V | VIN = VIH or VIL, /IOUT/ = 4.8mA, VCC = 5.5V, TA = -40°C to +85°C | 5 |
| Maximum LOW Level Output Voltage | VOL | | 0 | 0.1 | V | VIN = VIH, /IOUT/ = 20µA, TA = 25°C | 5 |
| Maximum LOW Level Output Voltage | VOL | | 0.2 | 0.26 | V | VIN = VIH, /IOUT/ = 4.0mA, VCC = 4.5V, TA = 25°C | 5 |
| Maximum LOW Level Output Voltage | VOL | | 0.2 | 0.33 | V | VIN = VIH, /IOUT/ = 4.0mA, VCC = 4.5V, TA = -40°C to +85°C | 5 |
| Maximum Input Current | IIN | -1 | 0.1 | 1 | µA | VIN = VCC or GND, VIH or VIL | 5 |
| Maximum Quiescent Supply Current | ICC | | 2 | 20 | µA | VIN = VCC or GND, IOUT = 0µA | 5 |
| Maximum Quiescent Supply Current | ICC | | 1.2 | 1.4 | mA | VIN = 2.4V or 0.5V | 5 |
| Maximum Propagation Delay | tPLH, tPHL | | 12 | 20 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = 25°C | 5 |
| Maximum Propagation Delay | tPLH, tPHL | | 12 | 25 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = -40°C to +85°C | 5 |
| Maximum Output Rise & Fall Time | tTHL, tTLH | | 8 | 15 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = 25°C | 5 |
| Maximum Output Rise & Fall Time | tTHL, tTLH | | 8 | 19 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 15pF, TA = -40°C to +85°C | 5 |
| Input Capacitance | CIN | | 5 | 10 | pF | TA = 25°C | 5 |
## CAD (KiCad official)
- Symbol: `MM74HCT32M`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mm74hct32m-etched.step` / `mm74hct32m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mm74hct32m.step` / `mm74hct32m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mm74hct32m-d.pdf) (8 pp, sha256 `f6f9a855f466c557`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mm74hct32m-datasheet.pdf)