component
MIC5891YN
Public Made by Adomby adom
Microchip Tech Latches, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"number": "1",
"name": "GROUND",
"type": "power_in",
"description": "Common ground return for the device, and the reference for the logic input low level, which is specified as VSS-0.3V to 0.8V at VDD = 5.0V to 12V."
},
{
"number": "2",
"name": "CLOCK",
"type": "input",
"description": "Serial data present at SERIAL DATA IN is shifted into the register on the rising edge of CLOCK, with a minimum clock pulse width of 150 ns and a maximum clock frequency of 3.3 MHz minimum (typically 5 MHz)."
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{
"number": "3",
"name": "SERIAL DATA IN",
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{
"number": "4",
"name": "STROBE",
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"description": "When held high, the 8 bits in the shift register are transferred to the latches, with a minimum strobe pulse width of 100 ns, and the latches keep accepting new data while STROBE stays high."
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{
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"type": "output",
"description": "Open-emitter Darlington output with suppression diode for inductive load transients, capable of sourcing 500 mA and sustaining at least 35 V in the on-state."
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{
"number": "6",
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"type": "output",
"description": "Open-emitter Darlington output with suppression diode for inductive load transients, capable of sourcing 500 mA and sustaining at least 35 V in the on-state."
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"mic5891yn-hero.glb",
"mic5891yn-hero.overlay.json",
"mic5891yn-etched.glb"
],
"visibility": {
"public": true
}
}