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docs md8942: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
md8942-etched.fit.json md8942: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
md8942-etched.glb md8942: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
md8942-etched.step md8942: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
md8942.glb Publish 0.1.0 · Ray
md8942.kicad_mod Publish 0.1.0 · Ray
md8942.kicad_sym Publish 0.1.0 · Ray
md8942.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
md8942.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json md8942: specified limits as data (metadata.characteristics, 33 rows from the datasheet) · Ray
README.md md8942: specified limits as data (metadata.characteristics, 33 rows from the datasheet) · Ray

MD8942

Shanghai Mingda Microelectronics · DC-DC Converters · SOT-23-6L

MD8942 from Shanghai Mingda Microelectronics, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BST passive Bootstrap pin providing gate-drive bias for the internal high-side switch FET. Connect a bootstrap capacitor (Cboot) between BST and SW. Absolute max BST-to-SW voltage is 6V; internally charged to ~5V from VCB through a diode.
2 GND power_in Device ground connection. Should be connected as close as possible to the output capacitor to avoid high current switching paths and to serve as the reference for feedback and enable.
3 FB input Feedback input to the internal error amplifier. Set the output voltage via a resistor divider from VOUT to FB using VOUT = VFB × (1 + R2/R1), where VFB is typically 0.794V. Absolute max -0.3V to 6V.
4 EN input Enable input, active-high logic. Pulling EN above the ~1V rising threshold enables the chip; pulling below the falling threshold (~0.84V, 160mV hysteresis) shuts it down. Floating EN disables the chip (internal 430kΩ pull-down to GND). Internal zener clamps EN to ~5V, absolute max 6V, sink current limit 100µA.
5 VIN power_in Input supply pin. Operating range 4V to 36V, standoff input voltage 42V. Bypass with a low-ESR ceramic input capacitor (typ. 10µF) placed as close as possible to VIN and GND.
6 SW output Switch node - the output of the internal high-side and low-side power MOSFETs. Connect to the external inductor and to the bootstrap capacitor's low side. Absolute max -0.3V to VIN(MAX)+0.3V.

Key specifications

Parameter Value
Manufacturer Shanghai Mingda Microelectronics
Package SOT-23-6L
Category PMIC
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (VIN) VIN -0.3 42 V 2
Switch Voltage (VSW), max printed as VIN(MAX)+0.3V VSW -0.3 V 2
BST to SW -0.3 6 V 2
Enable (VEN) VEN 6 V 2
Enable Sink Current (VEN) 100 μA 2
All Other Pins -0.3 6 V 2
Storage Temperature Range -65 150 ℃ 2
Junction Temperature 150 ℃ 2
Operating Temperature Range -40 85 ℃ 2
ESD Human Body Model (HBM) 2 kV HBM, minimum level 2
Input Voltage Range VIN_R 4 36 V 3
VIN UVLO Up Threshold VUVLO_U 3.2 3.6 3.9 V 3
Feedback Voltage VFB 0.778 0.794 0.81 V 4.8V < VIN < 36V, Iout=10mA 3
Oscillator Frequency fSW 880 1100 1320 kHz 3
Input Standoff Voltage VIN_S 42 V VEN = 0V 3
VIN UVLO Hysteresis VUVLO_HYS 0.3 V 3
High-Side Switch on Resistance RON_HS 650 mOhms VBST-VSW=5V 3
Low-Side Switch on Resistance RON_LS 650 mOhms 3
High-Side Switch Leakage ISW_HS_LKG 0.1 μA VEN = 0V, VSW = 0V 3
Low-Side Switch Leakage ISW_LS_LKG 0.2 μA VEN = 0V, VSW = VIN 3
Peak Inductor Current Limit IHS_Limit 1.2 A 3
COMP to Current Sense Transconductance GCS 2.7 A/V 3
Soft-start time TSS 0.5 msec VFB from 0 to 0.8V 3
Foldback Frequency fSW_F 80 kHz 3
Minimum Switch on Time τON 100 ns 3
Shutdown Supply Current ISHDN 3 μA VEN = 0V 3
Average Quiescent Supply Current IQ 130 μA No load, VFB = 0.9V 3
Thermal Shutdown TSD 155 ℃ 3
Thermal Shutdown Hysteresis TSD_HYS 20 ℃ 3
Enable up Threshold VEN_U 1 V 3
Enable Threshold Hysteresis VEN_HYS 0.16 V 3
Enable Clamping Voltage 5 V 3
Enable Pull-Down Resistance 430 kOhms 3

CAD (KiCad official)

  • Symbol: MD8942
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: md8942-etched.step / md8942-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); md8942.step / md8942.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
md8942.step 97 KB You want the bare part, or you mark your own boards.
md8942-etched.step 1.5 MB You want the part with MD8942 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 360 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Mingda Microelectronics datasheet (13 pp, sha256 758503482648cacf, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF