component
MD57E12WB6
Public Made by Adomby adom
Shanghai Mingda Microelectronics Linear Voltage Regulators (LDO), XDFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MD57E12WB6
Shanghai Mingda Microelectronics · Linear Voltage Regulators (LDO) · XDFN-4-EP(1x1)
MD57E12WB6 from Shanghai Mingda Microelectronics, in a XDFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin, specified from 2.2 V to 5.5 V with an absolute maximum rating of -0.3 V to 6.0 V, and requires a 1 µF ceramic input capacitor. |
| 2 | EN | input | Enable input: the voltage must exceed VENH (0.85 V min) to fully enable the device and be below VENL (0.35 V max) to disable it and activate output discharge, and it is internally pulled down to GND through 1 MΩ. |
| 3 | GND | power_in | Ground reference pin for the regulator. |
| 4 | VOUT | power_out | Regulated output of 1.2 V for this part (±2% tolerance) rated up to 300 mA, requiring at least a 1 µF ceramic output capacitor that may be placed up to 10 cm away. |
| 5 | EP | passive | Exposed thermal pad shown on the package drawing; the datasheet does not state its electrical function or required connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | XDFN-4-EP(1x1) |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage tolerance (VOUT(S) < 2.0 V, IOUT=1mA) | VOUT(S) | -0.03 | 0 | 0.03 | V | VIN=VOUT(S)+2.0V, IOUT=1mA, VOUT(S)<2.0V; printed as VOUT(S)-0.03 / VOUT(S)+0.03 | 4 |
| Dropout Voltage (VOUT < 3 V) | VDROP | 130 | mV | VEN=VIN, VOUT<3V, IOUT=300mA | 4 | ||
| Line Regulation | ΔVOUT/(VOUT·ΔVIN) | 0.02 | 0.1 | %/V | VOUT(S)+1.0V≤VIN=VEN≤5.5V, IOUT=10mA | 4 | |
| Line Transient (VIN rising VOUT+1V to VOUT+2V) | VOUT_Line | -1 | mV | VIN=VOUT+1V to VOUT+2V in 30us | 4 | ||
| Line Transient (VIN falling VOUT+2V to VOUT+1V) | VOUT_Line | 1 | mV | VIN=VOUT+2V to VOUT+1V in 30us | 4 | ||
| Load Regulation | VOUT2 | 10 | 20 | mV | VIN=VEN=VOUT(S)+1.0V, 1mA≤IOUT≤300mA | 4 | |
| Load Transient (IOUT 1mA to 300mA in 10µs) | VOUT_Load | -40 | mV | IOUT=1mA to 300mA in 10µs | 4 | ||
| Load Transient (IOUT 300mA to 1mA in 10µs) | VOUT_Load | 40 | mV | IOUT=300mA to 1mA in 10µs | 4 | ||
| Output Voltage Temperature Stability | TCVOUT | -100 | 100 | ppm/℃ | VIN=VEN=VOUT(S)+1.0V, IOUT=1mA, -40℃≤Ta≤125℃ | 4 | |
| GND Current (no load) | IGND | 20 | 30 | µA | VEN=VIN, no load | 4 | |
| GND Current (IOUT=300mA) | IGND | 470 | µA | VEN=VIN, IOUT=300mA | 4 | ||
| Shutdown Current | ISHUT | 0.01 | 0.1 | µA | VIN=5.5V, VEN=0 | 4 | |
| Input Voltage | VIN | 2.2 | 5.5 | V | 4 | ||
| Maximum Output Current | IOUTMAX | 250 | 300 | mA | 4 | ||
| Current Limit | ILIM | 500 | mA | VIN=VEN=VOUT(S)+1.0V, VOUT=0.95×VOUT(S) | 4 | ||
| COUT Auto Discharge Resistance | RDCHG | 240 | Ω | VEN=0, VOUT=VOUT(S) | 4 | ||
| Power Supply Rejection Ratio f=1kHz | PSRR | 94 | dB | f=1kHz, IOUT=20mA | 4 | ||
| Power Supply Rejection Ratio f=10kHz | PSRR | 72 | dB | f=10kHz, IOUT=20mA | 4 | ||
| Power Supply Rejection Ratio f=100kHz | PSRR | 77 | dB | f=100kHz, IOUT=20mA | 4 | ||
| Power Supply Rejection Ratio f=1MHz | PSRR | 53 | dB | f=1MHz, IOUT=20mA | 4 | ||
| Output Noise Voltage | eN | 20 | µVRMS | IOUT=20mA | 4 | ||
| Start-Up Time | TSTART | 80 | 150 | µs | From VEN>VENH to VOUT=95% of VOUT | 4 | |
| Overshoot on Start-Up | VOUT_Start-up | 5 | % | Stated as a percentage of VOUT(S) | 4 | ||
| EN 'H' Level Voltage | VENH | 0.85 | 5.5 | V | 4 | ||
| EN 'L' Level Voltage | VENL | 0 | 0.35 | V | 4 | ||
| EN 'H' Level Current | IENH | -0.1 | 0.1 | µA | VIN=5.5V, VEN=VIN | 4 | |
| EN 'L' Level Current | IENL | -0.1 | 0.1 | µA | VIN=5.5V, VEN=0 | 4 | |
| Over Temperature Protection | OTP | 155 | ℃ | IOUT=1mA | 4 | ||
| Input Voltage (absolute maximum) | VIN | -0.3 | 6 | V | 3 | ||
| Power Dissipation (DFN1*1-4L) | PD | 200 | mW | DFN1*1-4L package | 3 | ||
| Thermal Resistance Junction-to-Board (DFN1*1-4L) | RθJB | 160 | ℃/W | DFN1*1-4L, mounted on JEDEC 4-layer (2s2p) PCB | 3 | ||
| Operating Ambient Temperature | Topr | -40 | 85 | ℃ | 3 | ||
| Storage Temperature | Tstg | -40 | 125 | ℃ | 3 | ||
| ESD Protection HBM | ESD HBM | 6000 | V | HBM | 3 | ||
| Operating Junction Temperature | TJ | -40 | 125 | ℃ | 10 | ||
| Output Capacitor Range | COUT | 1 | 10 | µF | Design requirement | 10 | |
| Input/Output Capacitor ESR Range | ESR | 5 | 500 | mΩ | Design requirement | 10 |
CAD (KiCad official)
- Symbol:
MD57E12WB6 - Footprint:
Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm - 3D model: XDFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
md57e12wb6-etched.step/md57e12wb6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);md57e12wb6.step/md57e12wb6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Mingda Microelectronics datasheet (12 pp, sha256
42680ba6ee0683b4, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MD57E12WB6
**Shanghai Mingda Microelectronics** · Linear Voltage Regulators (LDO) · XDFN-4-EP(1x1)
MD57E12WB6 from Shanghai Mingda Microelectronics, in a XDFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin, specified from 2.2 V to 5.5 V with an absolute maximum rating of -0.3 V to 6.0 V, and requires a 1 µF ceramic input capacitor. |
| 2 | EN | input | Enable input: the voltage must exceed VENH (0.85 V min) to fully enable the device and be below VENL (0.35 V max) to disable it and activate output discharge, and it is internally pulled down to GND through 1 MΩ. |
| 3 | GND | power_in | Ground reference pin for the regulator. |
| 4 | VOUT | power_out | Regulated output of 1.2 V for this part (±2% tolerance) rated up to 300 mA, requiring at least a 1 µF ceramic output capacitor that may be placed up to 10 cm away. |
| 5 | EP | passive | Exposed thermal pad shown on the package drawing; the datasheet does not state its electrical function or required connection. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | XDFN-4-EP(1x1) |
| Category | Power Management ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage tolerance (VOUT(S) < 2.0 V, IOUT=1mA) | VOUT(S) | -0.03 | 0 | 0.03 | V | VIN=VOUT(S)+2.0V, IOUT=1mA, VOUT(S)<2.0V; printed as VOUT(S)-0.03 / VOUT(S)+0.03 | 4 |
| Dropout Voltage (VOUT < 3 V) | VDROP | | 130 | | mV | VEN=VIN, VOUT<3V, IOUT=300mA | 4 |
| Line Regulation | ΔVOUT/(VOUT·ΔVIN) | | 0.02 | 0.1 | %/V | VOUT(S)+1.0V≤VIN=VEN≤5.5V, IOUT=10mA | 4 |
| Line Transient (VIN rising VOUT+1V to VOUT+2V) | VOUT_Line | -1 | | | mV | VIN=VOUT+1V to VOUT+2V in 30us | 4 |
| Line Transient (VIN falling VOUT+2V to VOUT+1V) | VOUT_Line | | | 1 | mV | VIN=VOUT+2V to VOUT+1V in 30us | 4 |
| Load Regulation | VOUT2 | | 10 | 20 | mV | VIN=VEN=VOUT(S)+1.0V, 1mA≤IOUT≤300mA | 4 |
| Load Transient (IOUT 1mA to 300mA in 10µs) | VOUT_Load | -40 | | | mV | IOUT=1mA to 300mA in 10µs | 4 |
| Load Transient (IOUT 300mA to 1mA in 10µs) | VOUT_Load | | | 40 | mV | IOUT=300mA to 1mA in 10µs | 4 |
| Output Voltage Temperature Stability | TCVOUT | -100 | | 100 | ppm/℃ | VIN=VEN=VOUT(S)+1.0V, IOUT=1mA, -40℃≤Ta≤125℃ | 4 |
| GND Current (no load) | IGND | | 20 | 30 | µA | VEN=VIN, no load | 4 |
| GND Current (IOUT=300mA) | IGND | | 470 | | µA | VEN=VIN, IOUT=300mA | 4 |
| Shutdown Current | ISHUT | | 0.01 | 0.1 | µA | VIN=5.5V, VEN=0 | 4 |
| Input Voltage | VIN | 2.2 | | 5.5 | V | | 4 |
| Maximum Output Current | IOUTMAX | | 250 | 300 | mA | | 4 |
| Current Limit | ILIM | | 500 | | mA | VIN=VEN=VOUT(S)+1.0V, VOUT=0.95×VOUT(S) | 4 |
| COUT Auto Discharge Resistance | RDCHG | | 240 | | Ω | VEN=0, VOUT=VOUT(S) | 4 |
| Power Supply Rejection Ratio f=1kHz | PSRR | | 94 | | dB | f=1kHz, IOUT=20mA | 4 |
| Power Supply Rejection Ratio f=10kHz | PSRR | | 72 | | dB | f=10kHz, IOUT=20mA | 4 |
| Power Supply Rejection Ratio f=100kHz | PSRR | | 77 | | dB | f=100kHz, IOUT=20mA | 4 |
| Power Supply Rejection Ratio f=1MHz | PSRR | | 53 | | dB | f=1MHz, IOUT=20mA | 4 |
| Output Noise Voltage | eN | | 20 | | µVRMS | IOUT=20mA | 4 |
| Start-Up Time | TSTART | | 80 | 150 | µs | From VEN>VENH to VOUT=95% of VOUT | 4 |
| Overshoot on Start-Up | VOUT_Start-up | | | 5 | % | Stated as a percentage of VOUT(S) | 4 |
| EN 'H' Level Voltage | VENH | 0.85 | | 5.5 | V | | 4 |
| EN 'L' Level Voltage | VENL | 0 | | 0.35 | V | | 4 |
| EN 'H' Level Current | IENH | -0.1 | | 0.1 | µA | VIN=5.5V, VEN=VIN | 4 |
| EN 'L' Level Current | IENL | -0.1 | | 0.1 | µA | VIN=5.5V, VEN=0 | 4 |
| Over Temperature Protection | OTP | | 155 | | ℃ | IOUT=1mA | 4 |
| Input Voltage (absolute maximum) | VIN | -0.3 | | 6 | V | | 3 |
| Power Dissipation (DFN1*1-4L) | PD | | | 200 | mW | DFN1*1-4L package | 3 |
| Thermal Resistance Junction-to-Board (DFN1*1-4L) | RθJB | | | 160 | ℃/W | DFN1*1-4L, mounted on JEDEC 4-layer (2s2p) PCB | 3 |
| Operating Ambient Temperature | Topr | -40 | | 85 | ℃ | | 3 |
| Storage Temperature | Tstg | -40 | | 125 | ℃ | | 3 |
| ESD Protection HBM | ESD HBM | | | 6000 | V | HBM | 3 |
| Operating Junction Temperature | TJ | -40 | | 125 | ℃ | | 10 |
| Output Capacitor Range | COUT | 1 | | 10 | µF | Design requirement | 10 |
| Input/Output Capacitor ESR Range | ESR | 5 | | 500 | mΩ | Design requirement | 10 |
## CAD (KiCad official)
- Symbol: `MD57E12WB6`
- Footprint: `Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm`
- 3D model: XDFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files: `md57e12wb6-etched.step` / `md57e12wb6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `md57e12wb6.step` / `md57e12wb6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shanghai Mingda Microelectronics datasheet](docs/md57e12wb6-datasheet.pdf) (12 pp, sha256 `42680ba6ee0683b4`, retrieved 2026-11-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/md57e12wb6-datasheet.pdf)