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MCQ07NP03A-TP

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MCC(美微科) MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCQ07NP03A-TP

MCC(美微科) · MOSFETs · SOP-8

MCQ07NP03A-TP from MCC(美微科), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of the first MOSFET channel (labelled S1 in the pin diagram); the datasheet gives no separate pin-level voltage or current limit.
2 G1 input Gate of the first MOSFET channel; gate-source voltage is rated ±20 V.
3 S2 passive Source terminal of the second MOSFET channel (labelled S2 in the pin diagram); the datasheet gives no separate pin-level voltage or current limit.
4 G2 input Gate of the second MOSFET channel; gate-source voltage is rated ±20 V.
5 D2 passive Drain of the second MOSFET channel (labelled D2); drain-source voltage is rated 30 V for the N-channel device and -30 V for the P-channel device.
6 D2 passive Drain of the second MOSFET channel (labelled D2); drain-source voltage is rated 30 V for the N-channel device and -30 V for the P-channel device.
7 D1 passive Drain of the first MOSFET channel (labelled D1); drain-source voltage is rated 30 V for the N-channel device and -30 V for the P-channel device.
8 D1 passive Drain of the first MOSFET channel (labelled D1); drain-source voltage is rated 30 V for the N-channel device and -30 V for the P-channel device.

Key specifications

Parameter Value
Manufacturer MCC(美微科)
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
N-ch Gate-Threshold Voltage VGS(th) 1 1.5 2.2 V VDS=VGS, ID=250µA 2
N-ch Gate-Source Leakage Current IGSS -100 100 nA VDS=0V, VGS=±20V 2
N-ch Zero Gate Voltage Drain Current IDSS 1 µA VDS=30V, VGS=0V 2
N-ch Drain-Source Breakdown Voltage V(BR)DSS 30 V VGS=0V, ID=250µA 2
N-ch Drain-Source On-Resistance RDS(on) 15 18 mΩ VGS=10V, ID=6A 2
N-ch Drain-Source On-Resistance RDS(on) 23 30 mΩ VGS=4.5V, ID=5A 2
N-ch Gate Resistance RG 1.7 Ω f=1MHz, Open drain 2
N-ch Diode Forward Voltage VSD 1.2 V VGS=0V, IS=6A 2
N-ch Reverse Recovery Time trr 11 ns IF=5.6A, dIF/dt=100A/μs 2
N-ch Reverse Recovery Charge Qrr 3 nC IF=5.6A, dIF/dt=100A/μs 2
N-ch Input Capacitance Ciss 357 pF VDS=15V, VGS=0V, f=1MHz 2
N-ch Output Capacitance Coss 70 pF VDS=15V, VGS=0V, f=1MHz 2
N-ch Reverse Transfer Capacitance Crss 60 pF VDS=15V, VGS=0V, f=1MHz 2
N-ch Total Gate Charge Qg 8.5 nC VDS=15V, VGS=10V, ID=5.6A 2
N-ch Gate-Source Charge Qgs 0.9 nC VDS=15V, VGS=10V, ID=5.6A 2
N-ch Gate-Drain Charge Qgd 2 nC VDS=15V, VGS=10V, ID=5.6A 2
N-ch Turn-On Delay Time td(on) 5 ns VDD=15V, VGS=10V, RG=3Ω, ID=5.6A 2
N-ch Turn-On Rise Time tr 4 ns VDD=15V, VGS=10V, RG=3Ω, ID=5.6A 2
N-ch Turn-Off Delay Time td(off) 12 ns VDD=15V, VGS=10V, RG=3Ω, ID=5.6A 2
N-ch Turn-Off Fall Time tf 3 ns VDD=15V, VGS=10V, RG=3Ω, ID=5.6A 2
P-ch Drain-Source Breakdown Voltage V(BR)DSS -30 V VGS=0V, ID=-250µA 3
P-ch Gate-Source Leakage Current IGSS -100 100 nA VDS=0V, VGS=±20V 3
P-ch Zero Gate Voltage Drain Current IDSS -1 µA VDS=-30V, VGS=0V 3
P-ch Gate-Threshold Voltage VGS(th) -1 -1.5 -2.5 V VDS=VGS, ID=-250µA 3
P-ch Drain-Source On-Resistance RDS(on) 17 23 mΩ VGS=-10V, ID=-6A 3
P-ch Drain-Source On-Resistance RDS(on) 22 34 mΩ VGS=-4.5V, ID=-5A 3
P-ch Gate Resistance RG 10 Ω f=1MHz, Open drain 3
P-ch Continuous Body Diode Current IS -7 A 3
P-ch Diode Forward Voltage VSD -1.2 V VGS=0V, IS=-6A 3
P-ch Reverse Recovery Time trr 18 ns IF=-7.5A, dIF/dt=100A/μs 3
P-ch Reverse Recovery Charge Qrr 8 nC IF=-7.5A, dIF/dt=100A/μs 3
P-ch Input Capacitance Ciss 1623 pF VDS=-15V, VGS=0V, f=1MHz 3
P-ch Output Capacitance Coss 188 pF VDS=-15V, VGS=0V, f=1MHz 3
P-ch Reverse Transfer Capacitance Crss 165 pF VDS=-15V, VGS=0V, f=1MHz 3
P-ch Total Gate Charge Qg 31 nC VDS=-15V, VGS=-10V, ID=-9A 3
P-ch Gate-Source Charge Qgs 4 nC VDS=-15V, VGS=-10V, ID=-9A 3
P-ch Gate-Drain Charge Qgd 5.5 nC VDS=-15V, VGS=-10V, ID=-9A 3
P-ch Turn-On Delay Time td(on) 9 ns VDD=-15V, VGS=-10V, RG=2.5Ω, ID=-7.5A 3
P-ch Turn-On Rise Time tr 13 ns VDD=-15V, VGS=-10V, RG=2.5Ω, ID=-7.5A 3
P-ch Turn-Off Delay Time td(off) 54 ns VDD=-15V, VGS=-10V, RG=2.5Ω, ID=-7.5A 3
P-ch Turn-Off Fall Time tf 25 ns VDD=-15V, VGS=-10V, RG=2.5Ω, ID=-7.5A 3
Operating Junction Temperature Range TJ -55 150 °C 1
Storage Temperature Range TSTG -55 150 °C 1
Total Power Dissipation PD 1.6 W Note 3 1
N-ch Drain-Source Voltage VDS 30 V 1
P-ch Drain-Source Voltage VDS -30 V 1
N-ch Gate-Source Voltage VGS -20 20 V 1
P-ch Gate-Source Voltage VGS -20 20 V 1
N-ch Continuous Drain Current ID 7 A TA=25°C 1
N-ch Continuous Drain Current ID 5.6 A TA=70°C 1
P-ch Continuous Drain Current ID -7 A TA=25°C 1
P-ch Continuous Drain Current ID -5.6 A TA=70°C 1
N-ch Pulsed Drain Current IDM 28 A Note 4 1
P-ch Pulsed Drain Current IDM -28 A Note 4 1
Thermal Resistance Junction to Ambient RθJA 78 °C/W Note 2: 1 in² FR-4 board, 2oz copper, still air, TA=25°C 1

CAD (KiCad official)

  • Symbol: MCQ07NP03A-TP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcq07np03a-tp-etched.step / mcq07np03a-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcq07np03a-tp.step / mcq07np03a-tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MCC(美微科) datasheet (10 pp, sha256 7e0d0a5f10cef67f, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF