component
MCP6294-E
Public Made by Adomby adom
Microchip Tech Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| mcp6294-e-etched.step | 7d ago |
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MCP6294-E
Microchip Tech · Operational Amplifier · SOIC-14
MCP6294-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A, a low-impedance voltage source that swings to within 15 mV of VDD and VSS (VDD - 15 mV min, VSS + 15 mV max) with RL = 10 kΩ to VDD/2 at VDD = 5.5 V. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 3 | VINA+ | input | Noninverting input of op amp A, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 4 | VDD | power_in | Positive power supply, which must be 2.4 V to 6.0 V higher than VSS; bypass capacitors are needed on this pin. |
| 5 | VINB+ | input | Noninverting input of op amp B, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 7 | VOUTB | output | Analog output of op amp B, a low-impedance voltage source with rail-to-rail swing (VDD - 15 mV min, VSS + 15 mV max at RL = 10 kΩ to VDD/2, VDD = 5.5 V). |
| 8 | VOUTC | output | Analog output of op amp C, a low-impedance voltage source with rail-to-rail swing (VDD - 15 mV min, VSS + 15 mV max at RL = 10 kΩ to VDD/2, VDD = 5.5 V). |
| 9 | VINC- | input | Inverting input of op amp C, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 10 | VINC+ | input | Noninverting input of op amp C, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 11 | VSS | power_in | Negative power supply; for single-supply operation this pin is connected to ground. |
| 12 | VIND+ | input | Noninverting input of op amp D, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 13 | VIND- | input | Inverting input of op amp D, a high-impedance CMOS input with low bias current that can operate up to 0.3 V past either supply rail. |
| 14 | VOUTD | output | Analog output of op amp D, a low-impedance voltage source with rail-to-rail swing (VDD - 15 mV min, VSS + 15 mV max at RL = 10 kΩ to VDD/2, VDD = 5.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -3 | 3 | mV | VCM = VSS (Note 1) | 2 | |
| Power Supply Rejection Ratio | PSRR | 70 | 90 | dB | VCM = VSS (Note 1) | 2 | |
| Input Bias Current at TA = +85°C | IB | 50 | 200 | pA | TA = +85°C (Note 2) | 2 | |
| Input Bias Current at TA = +125°C | IB | 2 | 5 | nA | TA = +125°C (Note 2) | 2 | |
| Common-mode Rejection Ratio | CMRR | 70 | 85 | dB | VCM = -0.3V to 2.5V, VDD = 5V | 2 | |
| Common-mode Rejection Ratio | CMRR | 65 | 80 | dB | VCM = -0.3V to 5.3V, VDD = 5V | 2 | |
| DC Open-Loop Gain (Large Signal) | AOL | 90 | 110 | dB | VOUT = 0.2V to VDD, 0.2V, VCM = VSS (Note 1) | 3 | |
| Quiescent Current per Amplifier | IQ | 0.7 | 1 | 1.3 | mA | IO = 0 | 3 |
| Supply Voltage | VDD | 2.4 | 6 | V | TA = -40°C to +125°C (Note 5) | 3 | |
| Operating Temperature Range (E Temp) | TA | -40 | 125 | °C | Note | 4 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| VDD, VSS | 7 | V | 2 | ||||
| Current at Input Pins | -2 | 2 | mA | 2 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 2 | |||
| Maximum Junction Temperature | TJ | 155 | °C | 2 | |||
| ESD Protection On All Pins (HBM) | 4 | kV | HBM | 2 | |||
| ESD Protection On All Pins (CDM) | 2 | kV | CDM | 2 | |||
| ESD Protection On All Pins (MM) | 400 | V | MM | 2 | |||
| Thermal Resistance, 14L-SOIC | JA | 120 | °C/W | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 35 |
CAD (KiCad official)
- Symbol:
MCP6294-E - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mcp6294-e-etched.step/mcp6294-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6294-e.step/mcp6294-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (50 pp, sha256
0d01a38965ca7436, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).