# MCP604T-E

**Microchip Tech** · Operational Amplifier · SOIC-14

MCP604T-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Non-inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 4 | VDD | power_in | Positive power supply, 2.5V to 6.0V higher than VSS and needing bypass capacitors. |
| 5 | VINB+ | input | Non-inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B, a low-impedance voltage source. |
| 8 | VOUTC | output | Analog output of op amp C, a low-impedance voltage source. |
| 9 | VINC- | input | Inverting input of op amp C, a high-impedance CMOS input with low bias current. |
| 10 | VINC+ | input | Non-inverting input of op amp C, a high-impedance CMOS input with low bias current. |
| 11 | VSS | power_in | Negative power supply, connected to ground in single-supply use; VDD is 2.5V to 6.0V above it. |
| 12 | VIND+ | input | Non-inverting input of op amp D, a high-impedance CMOS input with low bias current. |
| 13 | VIND- | input | Inverting input of op amp D, a high-impedance CMOS input with low bias current. |
| 14 | VOUTD | output | Analog output of op amp D, a low-impedance voltage source. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -2 | 0.7 | 2 | mV | TA = +25°C | 2 |
| Input Offset Voltage, Extended Temperature | VOS | -4.5 | 1 | 4.5 | mV | TA = -40°C to +125°C (Note 1) | 2 |
| Power Supply Rejection Ratio | PSRR | 80 | 88 |  | dB | VDD = 2.7V to 5.5V | 2 |
| Input Bias Current, Extended Temperature | IB |  | 450 | 5000 | pA | TA = +125°C (Note 1) | 2 |
| Common Mode Rejection Ratio | CMRR | 75 | 90 |  | dB | VDD = 5.0V, VCM = -0.3V to 3.8V | 2 |
| DC Open-loop Gain (large signal) | AOL | 100 | 115 |  | dB | RL = 25 kΩ to VL, VOUT = 0.1V to VDD, 0.1V | 2 |
| DC Open-loop Gain (large signal) | AOL | 95 | 110 |  | dB | RL = 5 kΩ to VL, VOUT = 0.1V to VDD, 0.1V | 2 |
| Supply Voltage | VDD | 2.7 |  | 6 | V | Note 2 | 2 |
| Quiescent Current per Amplifier | IQ |  | 230 | 325 | µA | IO = 0 | 2 |
| Supply Voltage (VDD, VSS) | VDD-VSS |  |  | 7 | V |  | 2 |
| Current at Input Pins |  | -2 |  | 2 | mA | ±2 mA | 2 |
| Analog Input Voltage (VIN+, VIN-) |  | -1 |  | 1 | V | VSS, 1.0V to VDD + 1.0V (offsets relative to VSS/VDD) | 2 |
| All Other Inputs and Outputs |  | -0.3 |  | 0.3 | V | VSS, 0.3V to VDD + 0.3V (offsets relative to VSS/VDD) | 2 |
| Current at Output and Supply Pins |  | -30 |  | 30 | mA | ±30 mA | 2 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 2 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 2 |
| Specified Temperature Range, Extended | TA | -40 |  | 125 | °C | Extended temperature parts | 4 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | Note | 4 |
| Thermal Resistance, 14L-SOIC | θJA |  | 120 |  | °C/W |  | 4 |
| Input Offset Temperature Drift | ΔVOS/ΔTA |  | 2.5 |  | µV/°C | TA = -40°C to +125°C (±2.5) | 2 |
| Input Bias Current | IB |  | 1 |  | pA |  | 2 |
| Output Short Circuit Current | ISC |  | 22 |  | mA | VDD = 5.5V (±22) | 2 |
| Output Short Circuit Current | ISC |  | 12 |  | mA | VDD = 2.7V (±12) | 2 |
| Gain Bandwidth Product | GBWP |  | 2.8 |  | MHz |  | 3 |
| Phase Margin | PM |  | 50 |  | ° | G = +1 V/V | 3 |
| Slew Rate | SR |  | 2.3 |  | V/µs | G = +1 V/V | 3 |
| Settling Time (0.01%) | tsettle |  | 4.5 |  | µs | G = +1 V/V, 3.8V step | 3 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | P = Plastic DIP (300 mil body), 8, 14 lead SN = Plastic SOIC (3.90 mm body), 8 lead | 31 |

## CAD (KiCad official)

- Symbol: `MCP604T-E`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mcp604t-e-etched.step` / `mcp604t-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp604t-e.step` / `mcp604t-e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp604t-e-datasheet.pdf) (34 pp, sha256 `bd8b64186a1924f8`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp604t-e-datasheet.pdf)