component
MCP4921T-E
Public Made by Adomby adom
Microchip Tech Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "Microchip Tech Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"data acquisition",
"mcp4921t-e",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
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"files": [
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"README.md",
"mcp4921t-e.kicad_sym",
"mcp4921t-e.kicad_mod",
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],
"component": {
"mpn": "MCP4921T-E",
"manufacturer": "Microchip Tech",
"package": "SOIC-8",
"pin_count": 8,
"category": "Data Acquisition",
"subcategory": "Digital To Analog Converters (DAC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589794361707311104",
"parts": {
"symbol": "mcp4921t-e.kicad_sym",
"footprint": "mcp4921t-e.kicad_mod",
"model_3d": "mcp4921t-e-hero.glb",
"model_3d_plain": "mcp4921t-e-etched.glb",
"model_3d_step": "mcp4921t-e-etched.step",
"model_3d_step_plain": "mcp4921t-e.step",
"lbr": "mcp4921t-e.lbr"
},
"distributor_links": {
"lcsc": "C623659"
},
"distributor_check": {
"checked_at": "2026-10-21T00:59:42Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Positive supply voltage input that ranges from 2.7V to 5.5V relative to VSS, with a clean supply and about 0.1 µF ceramic plus 10 µF tantalum bypass capacitors recommended."
},
{
"number": "2",
"name": "CS",
"type": "input",
"description": "Active-low chip select input that must be low to enable the serial clock and data functions."
},
{
"number": "3",
"name": "SCK",
"type": "input",
"description": "SPI-compatible serial clock input."
},
{
"number": "4",
"name": "SDI",
"type": "input",
"description": "SPI-compatible serial data input."
},
{
"number": "5",
"name": "LDAC",
"type": "input",
"description": "DAC output synchronization input that, when driven low, transfers the input register contents to the output register and updates VOUT, and can be tied to VSS to update VOUT on the rising edge of CS."
},
{
"number": "6",
"name": "VREF",
"type": "power_in",
"description": "Voltage reference input whose input voltage can range from VSS to VDD and which may be tied to VDD."
},
{
"number": "7",
"name": "VSS",
"type": "power_in",
"description": "Analog ground pin and current return path that must be connected to a ground plane through a low-impedance connection."
},
{
"number": "8",
"name": "VOUT",
"type": "output",
"description": "DAC buffered analog output whose full-scale range is VSS to G×VREF (G = 1x or 2x) and which cannot go higher than VDD."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The provided text (11 of 50 pages) does not include the ordering/part-number decoder, so the 'T' (ta; Table 3-1 lists an Exposed Thermal Pad (EP, pin 9) for the DFN package only; it is not part of the 8"
],
"pages_sent": 11,
"cost_usd": 0.0376,
"at": "2026-10-21T00:57:00"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589794361707311104",
"pages": 50,
"sha256": "a52733deb49e0ae4",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"units": "mm",
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"seat": "z = 0",
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"zmin_mm": -0.0,
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"footprint_binding": "identity",
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"checked": "2026-10-21",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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{
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"sha256": "33d26e660242a80f1a112e85e69d971cc79d1cedf92711e3a9831faafd0134b1",
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