MCP4821-E

{
  "slug": "mcp4821-e",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "mcp4821-e",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "mcp4821-e.kicad_sym",
    "mcp4821-e.kicad_mod",
    "mcp4821-e.glb",
    "mcp4821-e.step",
    "mcp4821-e.lbr",
    "docs/hero.png",
    "docs/mcp4821-e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "mcp4821-e-hero.glb",
    "mcp4821-e-hero.overlay.json",
    "mcp4821-e-etched.glb"
  ],
  "component": {
    "mpn": "MCP4821-E",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882134136197120",
    "parts": {
      "symbol": "mcp4821-e.kicad_sym",
      "footprint": "mcp4821-e.kicad_mod",
      "model_3d": "mcp4821-e-hero.glb",
      "model_3d_plain": "mcp4821-e-etched.glb",
      "model_3d_step": "mcp4821-e-etched.step",
      "model_3d_step_plain": "mcp4821-e.step",
      "lbr": "mcp4821-e.lbr"
    },
    "distributor_links": {
      "lcsc": "C36865"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T21:11:30Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage input, which can range from 2.7V to 5.5V relative to VSS; a 0.1 µF ceramic bypass capacitor to ground, with an additional 10 µF tantalum in parallel, is recommended."
      },
      {
        "number": "2",
        "name": "CS",
        "type": "input",
        "description": "Chip Select input that requires an active low to enable the serial clock and data functions."
      },
      {
        "number": "3",
        "name": "SCK",
        "type": "input",
        "description": "SPI compatible serial clock input."
      },
      {
        "number": "4",
        "name": "SDI",
        "type": "input",
        "description": "SPI compatible serial data input."
      },
      {
        "number": "5",
        "name": "LDAC",
        "type": "input",
        "description": "DAC output synchronization input that, when low, transfers the input register contents to the output register so VOUT is updated; it can be tied to VSS to update VOUT on the rising edge of CS."
      },
      {
        "number": "6",
        "name": "SHDN",
        "type": "input",
        "description": "Hardware Shutdown input used to place the device in Shutdown mode, in which most internal circuits including the output amplifier are turned off and VOUT is presented with a known high-resistance load."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference point and analog ground/current return for all circuitry; it must be connected to a ground plane through a low-impedance connection."
      },
      {
        "number": "8",
        "name": "VOUT",
        "type": "output",
        "description": "DAC analog output with an output amplifier; the full-scale range is VSS to G×VREF (G = 1x or 2x) and it cannot go higher than VDD."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SOIC pin numbers come from the shared Table 3-1 column labelled 'MSOP, PDIP, SOIC, DFN' (page 15; The provided pages do not include the ordering/part-number table, so I could not confirm that MCP482; The datasheet pages provided give no electrical limits for the SHDN pin itself, so the SHDN descript"
        ],
        "pages_sent": 11,
        "cost_usd": 0.0473,
        "at": "2026-10-18T21:08:02"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882134136197120",
        "pages": 48,
        "sha256": "e4bf1d222bf746ef",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "mcp4821-e.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "mcp4821-e-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "58627a78bd5d4b0e85e03b5b2d58f37d9fa95b3d2d7358f04bce07435366f16c",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}