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MCP4541-103E

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Microchip Tech Digital Potentiometers, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP4541-103E

Microchip Tech · Digital Potentiometers · MSOP-8

MCP4541-103E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input Address 0 input for the I2C interface and High Voltage Command pin; A0 is latched at POR/BOR, and the pin is a High Voltage command input when driven to VIHH.
2 SCL input I2C serial clock input that accepts only external clock signals because the device is a slave.
3 SDA bidirectional I2C serial data I/O pin implemented as an open-drain N-channel driver.
4 VSS power_in Device ground reference; the voltage on the potentiometer terminals must be between VSS and VDD.
5 P0A passive Potentiometer 0 terminal A, connected to the full-scale wiper value (0x80 for 7-bit devices); the voltage must be between VSS and VDD and it can carry positive or negative current.
6 P0W passive Potentiometer 0 wiper terminal; the voltage must be between VSS and VDD and it can carry positive or negative current.
7 P0B passive Potentiometer 0 terminal B, the fixed connection to the zero-scale wiper value (0x00); the voltage must be between VSS and VDD and it can carry positive or negative current.
8 VDD power_in Positive power supply input relative to VSS; below Vmin (2.7V) the electrical performance may not meet the data sheet specifications.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category Data Acquisition
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
RAB end-to-end resistance (-103 device) RAB 8 10 12 kΩ -103 devices (Note 1) 5
RAB resistance tolerance -20 20 % Resistance (± 20%), -103 devices 5
Supply voltage VDD 2.7 5.5 V 4
Operating temperature range TA -40 125 °C 17
HVC pin voltage range VHV 12.5 V VDD ≥ 4.5V 4
VDD start voltage to ensure wiper reset (BOR) VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits reset state TBORD 10 20 µs Delay after device exits the reset state (VDD > VBOR) 4
Supply current, serial interface active at 3.4 MHz IDD 600 µA Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11), Write all 0’s to Volatile Wiper 0, VDD = 5.5V, FSCL = 3.4 MHz 4
Supply current, serial interface active at 100 kHz 250 µA Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11), Write all 0’s to Volatile Wiper 0, VDD = 5.5V, FSCL = 100 kHz 4
EE write current (write cycle) 575 µA EE Write Current (Write Cycle) (Nonvolatile device only), VDD = 5.5V, FSCL = 400 kHz, Write all 0’s to Nonvolatile Wiper 0, SCL = VIL or VIH 4
Serial interface inactive current 2.5 5 µA Serial Interface Inactive, (Stop condition, SCL = SDA = VIH), Wiper = 0, VDD = 5.5V, HVC/A0 = VIH 4
Wiper resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Full-scale error (10 k, 7-bit) VWFSE -2 -0.1 LSb 10 k 7-bit 3.0V ≤ VDD ≤ 5.5V 7
Zero-scale error (10 k, 7-bit) VWZSE 0.1 2 LSb 10 k 7-bit 3.0V ≤ VDD ≤ 5.5V 7
Potentiometer integral non-linearity INL -0.5 0.25 0.5 LSb 7-bit 7
Potentiometer differential non-linearity DNL -0.25 0.125 0.25 LSb 7-bit 7
Rheostat integral non-linearity (10 k, 7-bit) R-INL -1.125 0.5 1.125 LSb 7-bit, 5.5V, IW = 450 µA 9
Rheostat integral non-linearity (10 k, 7-bit) R-INL -4 2.5 4 LSb 7-bit, 3.0V, IW = 240 µA (Note 7) 9
Rheostat differential non-linearity (10 k, 7-bit) R-DNL -0.375 0.25 0.375 LSb 7-bit, 5.5V, IW = 450 µA 10
Rheostat differential non-linearity (10 k, 7-bit) R-DNL -0.75 0.5 0.75 LSb 7-bit, 3.0V, IW = 240 µA (Note 7) 10
Maximum current through terminal A IT 2.5 mA Terminal A IAW, W = Full-Scale (FS) 6
Maximum current through terminal B 2.5 mA Terminal B IBW, W = Zero Scale (ZS) 6
Maximum current through terminal W 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Maximum current terminal A to B (RAB min 8000) IAB 0.688 mA IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 8000 6
High-voltage input entry voltage (WiperLock) VIHHEN 8.5 12.5 V Threshold for WiperLock™ Technology 11
High-voltage limit VMAX 12.5 V Pin can tolerate VMAX or less. 11
Output low voltage (SDA) VOL 0.4 V VDD ≥ 2.0V, IOL = 3 mA 12
Weak pull-up / pull-down current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VIHH = 12.5V 12
Input leakage current IIL -1 1 µA VIN = VDD and VIN = VSS 12
EEPROM programming write cycle time tWC 5 10 ms 12
Voltage on VDD with respect to VSS -0.6 7 V 3
Voltage on HVC/A0, A1, A2, SCL, SDA and WP with respect to VSS -0.6 12.5 V 3
Voltage on all other pins (PxA, PxW, PxB) with respect to VSS -0.3 V Upper limit printed as VDD + 0.3V 3
Input clamp current IIK -20 20 mA VI < 0, VI > VDD, VI > VPP ON HV pins 3
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 3
Maximum output current sunk by any output pin 25 mA 3
Maximum output current sourced by any output pin 25 mA 3
Maximum current out of VSS pin 100 mA 3
Maximum current into VDD pin 100 mA 3
Maximum current into PXA, PXW and PXB pins -2.5 2.5 mA 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
Soldering temperature of leads 300 °C 10 seconds 3
Maximum junction temperature TJ 150 °C 3
I2C clock frequency, standard mode FSCL 0 100 kHz Cb = 400 pF, 1.8V - 5.5V 13
I2C clock frequency, fast mode FSCL 0 400 kHz Cb = 400 pF, 2.7V - 5.5V 13
I2C clock frequency, high-speed 1.7 MHz FSCL 0 1.7 MHz Cb = 400 pF, 4.5V - 5.5V 13
I2C clock frequency, high-speed 3.4 MHz FSCL 0 3.4 MHz Cb = 100 pF, 4.5V - 5.5V 13
Nominal resistance tempco RAB/T 50 ppm/°C TA = -20°C to +70°C 5
Nominal resistance tempco RAB/T 100 ppm/°C TA = -40°C to +85°C 5
Nominal resistance tempco RAB/T 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric tempco VWB/T 15 ppm/°C Code = Mid-scale (80h or 40h) 5
Thermal resistance, 8L-MSOP JA 211 °C/W 17

CAD (KiCad official)

  • Symbol: MCP4541-103E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4541-103e-etched.step / mcp4541-103e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4541-103e.step / mcp4541-103e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ad484e84f5bc6a00, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF